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原创 pm.inc

; 描述符图示; 图示一;; ------ ┏━━┳━━┓高地址; ┃ 7 ┃ 段 ┃; ┣━━┫ ┃; 基; 字节 7 ┆ ┆ ┆; 址; ┣━━┫ ② ┃; ┃ 0 ┃ ┃; ------ ┣━━╋━━┫; ┃ 7

2005-09-29 00:23:00 1464

原创经济学网站(二)

薛兆丰 http://www.stevenxue.com/

2005-08-08 00:41:00 1207

原创经济学的网站总结(一)

经济学的网站总结（从别人那里转来的） Sun Jul 27 10:34:04 2003 作者: nulsy 标题: 经济学常用网站时间: Sat May 10 03:10:35 2003 点击: 10 经济学常用网站 Sat May 10 00:39:58 2003 经济学常用网站经济学家的网上资源http://netec.wustl.edu/EconFAQ/EconFAQ.html

2005-08-06 00:37:00 2630

原创常用浏览器

常用浏览器有：IE5，IE6，Mozilla Firefox 1.0，Netscape 7.0，Mozilla，Opera

2005-08-05 04:11:00 1190

原创 Good wedsites on web design!

网页设计师： http://www.w3cn.org/index.htmlEric A. Meyer： http://www.meyerweb.com/eric/Jeffrey Zeldman：http://www.zeldman.com

2005-08-05 03:44:00 1034

原创 DIV和TABLE表格的使用

作者：allan 转载自：Allan.Blog(本文经作者同意转载,版权归作者所有.如果您需要引用或转载请与作者联系。) 原文发表时间：2004年11月9日今天有一好友MSN上突然问我这个话题,突然想到其实在论坛里面,关于DIV和TABLE表格的使用疑问有不少人发过贴子问过,这里我想整理一下我的思路!关于表格使用WEB标准之后,并不是说排除表格的使用,表格并不是鸡肋,而正好相反是一道大餐, 之所

2005-08-05 03:30:00 1276

原创 Forward: Migrate apps from Internet Explorer to Mozilla

This is a good article to talk about the difference between Mozilla and IE. From this article , you will also have a big image of the webpages implementation techologies nowadays.This article is po

2005-07-30 01:41:00 995

原创 How to use search engine on network effectively?

1. Use Google1.1 Search books e.g Search books about Java: inurl:java filetype:pdf BOOKNAMEReference: http://blog.youkuaiyun.com/airhand/archive/2005/07/29/439490.aspx

2005-07-30 01:28:00 1079

原创 Websites about testing

1. Grove Consultants: Specialists in Software Testing and Inspection http://www.grove.co.uk/ http://www.grove.co.uk/Site_Links.html

2005-07-30 01:19:00 1001

Icarus Verilog is a Verilog standard IEEE-1364 compiler that targets Linux but works almost as well on Windows. It's lightweight, free software and includes a virtual machine that simulates the design. This tutorial goes through the process of downloading, installing and using Icarus Verilog to write a simple program, compile it, simulate it and view the simulation results on a timing diagram. It assumes no previous knowledge on Verilog, but prior programming experience is recommended.

2014-02-01

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