G41 MCH 简介

The role of a (G)MCH in a system is to manage the flow of information

between its interfaces: the processor interface, the System Memory interface, the
External Graphics or PCI Express interface, internal graphics interfaces, and the I/O
Controller through DMI interface. This includes arbitrating between the interfaces when
each initiates transactions.
MCH 管理四个接口间的信息流。信息交换的仲裁；
1.2.1 HOST interface
The (G)MCH supports a FSB frequency of 800, 1066, 1333 MHz. Host-initiated I/O cycles are decoded to PCI
Express, DMI, or the (G)MCH configuration space. Host-initiated memory cycles are
decoded to PCI Express, DMI, or system memory. PCI Express device accesses to non-
cacheable system memory are not snooped on the host bus. Memory accesses initiated
from PCI Express using PCI semantics and from DMI to system SDRAM will be snooped
on the host bus.
PCIE 设备访问非cache系统内存不经过主机总线。DMI 到 SDRAM和 PCIE使用pci语义 的内存访问会经过主机总线
1.2.2 System Memory Interface
The (G)MCH integrates a system memory DDR2/DDR3 controller with two, 64-bit wide
interfaces. The buffers support both SSTL_1.8 (Stub Series Terminated Logic for 1.8 V)
and SSTL_1.5 (Stub Series Terminated Logic for 1.5V) signal interfaces. The memory
controller interface is fully configurable through a set of control registers.

双通道内存控制器，通过一个控制寄存器集合来配置
1.2.3 Direct Media Interface (DMI)
Direct Media Interface (DMI) is the chip-to-chip connection between the (G)MCH and
ICH10/ICH7. This high-speed interface integrates advanced priority-based servicing
allowing for concurrent traffic and true isochronous transfer capabilities. Base
functionality is completely software transparent permitting current and legacy software
to operate normally.
高速芯片接口提供了基于优先级的并发流量服务和真正的同步传输
To provide for true isochronous transfers and configurable Quality of Service (QoS)
transactions, the ICH10/ICH7 supports two virtual channels on DMI: VC0 and VC1.
These two channels provide a fixed arbitration scheme where VC1 is always the highest
priority. VC0 is the default conduit of traffic for DMI and is always enabled. VC1 must be
specifically enabled and configured at both ends of the DMI link (i.e., the ICH10/ICH7
and (G)MCH).
为提供真正的同步和可配置的高质量服务，DMI支持两个虚拟通道。混合仲裁机制，默认的DMI流量管道是VC0（总是enable），
高优先权的VC1管道必须在DMI连接的两端 配置并enable。
1.2.4 Multiplexed PCI Express* Graphics Interface and Intel®sDVO/DVI/HDMI/DP Interface
For the 82Q45, 82Q43, 82B43, 82G45, 82G43, and 82G41 GMCHs, the PCI Express
Interface is multiplexed with the SDVO and HDMI/DVI interfaces. For the 82P45 and
82P43 MCHs, the PCI Express Interface is not multiplexed.
对于有的MCH PCIE接口是非多路复用的
1.2.4.1 PCI Express* Interface
The (G)MCH supports either two PCI Express* 8-lane (x8) ports or one PCI Express 16-
lane (x16) port.
2个8通道  和 1个18通道
The (G)MCH contains one 16-lane (x16) PCI Express port intended for supporting up to
two external PCI Express graphics card in bifurcated mode, fully compliant to the PCI
Express Base Specification, Revision 2.0.
一个x16支持插2个显卡
1.2.5 Graphics Features (Intel® 82Q45, 82Q43, 82B43, 82G45,82G43, 82G41 GMCH Only)
The GMCH provides an integrated graphics device (IGD) delivering cost competitive 3D,
2D and video capabilities. DX10 and OpenGL 2.1 are supported. The GMCH contains an
extensive set of instructions for 3D operations, 2D operations, motion compensation,
overlay, and display control. HD-DVD and Blu-Ray are also natively supported with
hardware based VC-1, MPEG2, and AVC decode capabilities. The GMCH also supports
PAVP (Protected Audio-Video Path), which allows for protected Intel® HD Audio HDVideo Playback.

The GMCH uses a UMA configuration with DVMT for graphics memory. The GMCH also
has the capability to support external graphics accelerators via the PCI Express
Graphics (PEG) port but cannot work concurrently with the integrated graphics device.
High bandwidth access to data is provided through the system memory port.

支持扩展显卡加速功能，但不能和集显并行工作，系统内存接口提供了高带宽的数据访问