- SystemVerilog uses a “#” sign to list the Parameter names in a Class Header to define a Generic Class.
- When we specify a default Parameter in a Class Header, we don’t have to provide an Overrides for that Parameter when referencing that Class.
- A Generic Class & actual Parameter values is called a Specialization.
- Static Class Properties do not get allocated unless their Class is Specialized.
- Every Specialization has unique set of Static Properties
以sequence為例(new_sequence override packet_sequence):
class packet