gen already exists but is not a source folder

最新推荐文章于 2018-11-11 00:49:42 发布
最新推荐文章于 2018-11-11 00:49:42 发布
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本文介绍了一种解决Android开发中工程配置缺失问题的方法。通过详细步骤指导如何将gen文件夹添加到项目的Java构建路径中，从而修复由源文件路径配置错误导致的问题。

遇到这个问题的解决方法:

 1. 右键点击工程，选择 "Properties"

2. 选择左边的 "Java Build Path" 

3. 打开 "Source" 标签面板

4. 点击 "Add Folder..."

5. 勾选 "gen" 文件夹，点击OK，点击YES，再点击OK

6. 最后右键点击工程，选择 "Andriod Tools" 里面的 "Fix Project Properties"

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gen already exists but is not a source folder. Convert to a source folder or rename it
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遇到这个问题的解决方法: 右键点击工程，选择 "Properties" 选择左边的 "Java Build Path"  打开 "Source" 标签面板 点击 "Add Folder..." 勾选 "gen" 文件夹，点击OK，点击YES，再点击OK 最后右键点击工程，选择 "Andriod Tools" 里面的 "Fix Project Properties" 搞
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Determining the location of the ModelSim executable... Using: E:\intelFPGA\18.1\modelsim_ase\win32aloem To specify a ModelSim executable directory, select: Tools -> Options -> EDA Tool Options Note: if both ModelSim-Altera and ModelSim executables are available, ModelSim-Altera will be used. **** Generating the ModelSim Testbench **** quartus_eda --gen_testbench --tool=modelsim_oem --format=verilog --write_settings_files=off 1 -c 1 --vector_source="E:/intelFPGA/WORK/Waveform.vwf" --testbench_file="E:/intelFPGA/WORK/simulation/qsim/Waveform.vwf.vt" Info: ******************************************************************* Info: Running Quartus Prime EDA Netlist Writer Info: Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition Info: Copyright (C) 2018 Intel Corporation. All rights reserved. Info: Your use of Intel Corporation's design tools, logic functions Info: and other software and tools, and its AMPP partner logic Info: functions, and any output files from any of the foregoing Info: (including device programming or simulation files), and any Info: associated documentation or information are expressly subject Info: to the terms and conditions of the Intel Program License Info: Subscription Agreement, the Intel Quartus Prime License Agreement, Info: the Intel FPGA IP License Agreement, or other applicable license Info: agreement, including, without limitation, that your use is for Info: the sole purpose of programming logic devices manufactured by Info: Intel and sold by Intel or its authorized distributors. Please Info: refer to the applicable agreement for further details. Info: Processing started: Thu May 22 00:35:13 2025 Info: Command: quartus_eda --gen_testbench --tool=modelsim_oem --format=verilog --write_settings_files=off 1 -c 1 --vector_source=E:/intelFPGA/WORK/Waveform.vwf --testbench_file=E:/intelFPGA/WORK/simulation/qsim/Waveform.vwf.vt Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance. Completed successfully. Completed successfully. **** Generating the functional simulation netlist **** quartus_eda --write_settings_files=off --simulation --functional=on --flatten_buses=off --tool=modelsim_oem --format=verilog --output_directory="E:/intelFPGA/WORK/simulation/qsim/" 1 -c 1 Info: ******************************************************************* Info: Running Quartus Prime EDA Netlist Writer Info: Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition Info: Copyright (C) 2018 Intel Corporation. All rights reserved. Info: Your use of Intel Corporation's design tools, logic functions Info: and other software and tools, and its AMPP partner logic Info: functions, and any output files from any of the foregoing Info: (including device programming or simulation files), and any Info: associated documentation or information are expressly subject Info: to the terms and conditions of the Intel Program License Info: Subscription Agreement, the Intel Quartus Prime License Agreement, Info: the Intel FPGA IP License Agreement, or other applicable license Info: agreement, including, without limitation, that your use is for Info: the sole purpose of programming logic devices manufactured by Info: Intel and sold by Intel or its authorized distributors. Please Info: refer to the applicable agreement for further details. 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Android 开发：gen already exists but is not a source folder. Convert to a source folder or rename it
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遇到这个问题的解决方法:  1. 右键点击工程，选择 "Properties" 2. 选择左边的 "Java Build Path"  3. 打开 "Source" 标签面板 4. 点击 "Add Folder..." 5. 勾选 "gen" 文件夹，点击OK，点击YES，再点击OK 6. 最后右键点击工程，选择 "Andriod Tools" 里面的 "Fix Project Pro
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解决这个错误的方法如下： 1.右键选择Properties. 2.选择Java Build Path,再选择Source. 3.点击右边的Add Folder, 选中gen文件夹，点击OK，之后Yes. 4.右键选择Android Tools, 点击Fix Project Properties . 这样我们就把gen文件夹转变为一个source folder了
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