mod_fifo内部用的表

 表如下:

/*
 Navicat Premium Data Transfer

 Source Server         : c-freeswitch-fifo
 Source Server Type    : SQLite
 Source Server Version : 3017000
 Source Schema         : main

 Target Server Type    : SQLite
 Target Server Version : 3017000
 File Encoding         : 65001

 Date: 24/05/2019 14:05:32
*/

PRAGMA foreign_keys = false;

-- ----------------------------
-- Table structure for fifo_bridge
-- ----------------------------
DROP TABLE IF EXISTS "fifo_bridge";
CREATE TABLE "fifo_bridge" (
  "fifo_name" varchar(1024) NOT NULL,
  "caller_uuid" varchar(255) NOT NULL,
  "caller_caller_id_name" varchar(255),
  "caller_caller_id_number" varchar(255),
  "consumer_uuid" varchar(255) NOT NULL,
  "consumer_outgoing_uuid" varchar(255),
  "bridge_start" integer
);

-- ----------------------------
-- Table structure for fifo_callers
-- ----------------------------
DROP TABLE IF EXISTS "fifo_callers";
CREATE TABLE "fifo_callers" (
  "fifo_name" varchar(255) NOT NULL,
  "uuid" varchar(255) NOT NULL,
  "caller_caller_id_name" varchar(255),
  "caller_caller_id_number" varchar(255),
  "timestamp" integer
);

-- ----------------------------
-- Table structure for fifo_outbound
-- ----------------------------
DROP TABLE IF EXISTS "fifo_outbound";
CREATE TABLE "fifo_outbound" (
  "uuid" varchar(255),
  "fifo_name" varchar(255),
  "originate_string" varchar(255),
  "simo_count" integer,
  "use_count" integer,
  "timeout" integer,
  "lag" integer,
  "next_avail" integer NOT NULL DEFAULT 0,
  "expires" integer NOT NULL DEFAULT 0,
  "static" integer NOT NULL DEFAULT 0,
  "outbound_call_count" integer NOT NULL DEFAULT 0,
  "outbound_fail_count" integer NOT NULL DEFAULT 0,
  "hostname" varchar(255),
  "taking_calls" integer NOT NULL DEFAULT 1,
  "status" varchar(255),
  "outbound_call_total_count" integer NOT NULL DEFAULT 0,
  "outbound_fail_total_count" integer NOT NULL DEFAULT 0,
  "active_time" integer NOT NULL DEFAULT 0,
  "inactive_time" integer NOT NULL DEFAULT 0,
  "manual_calls_out_count" integer NOT NULL DEFAULT 0,
  "manual_calls_in_count" integer NOT NULL DEFAULT 0,
  "manual_calls_out_total_count" integer NOT NULL DEFAULT 0,
  "manual_calls_in_total_count" integer NOT NULL DEFAULT 0,
  "ring_count" integer NOT NULL DEFAULT 0,
  "start_time" integer NOT NULL DEFAULT 0,
  "stop_time" integer NOT NULL DEFAULT 0
);

PRAGMA foreign_keys = true;

主要有三个:

fifo_bridge:保存caller被坐席服务后的实时记录,如果通话结束,记录即消失

fifo_callers:保存正在等待服务的主叫,被服务后,或挂机,记录即消失

fifo_outbound:保存已登记的坐席,登记包括从fifo.conf.xml中获取的,以及动态登记的。

 

 

case (fsm_Cmd_ctrl) //-------------------------------------------------------------------------------------------------------------- // State-0, 上电初始化操控源选择 FSM_CmdCtrl_SEL_INIT_SRC: begin //fsm_Cmd_ctrl <= #1 (SW_HOST_INIT_MIPI_ON)? FSM_CmdCtrl_HOST_INIT : FSM_CmdCtrl_MCU_INIT; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_MCU_INIT; end //-------------------------------------------------------------------------------------------------------------- // State-1, MCU上电初始化配置2828和Command操作 FSM_CmdCtrl_MCU_INIT: begin // 进行MCU配置 (在启动fpga操作使能之前) if (mcuCfg_fpga_ena == 0) begin // 寄存器0xd8h fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_MCU_INIT; // MCU对ssd2828和fpga Cmd_if共同设置 case(MIPI_COMMAND_VIDEO_MOD_SEL) // 0: 正常工作时, 由上层MCU或FPGA host选择模式 0: mipi_mod_sel <= #1 mcuCfg_mipi_mod_sel ; // (寄存器0xd0h bit0) // 1: 在调试时, 强制设为Video模式 1: mipi_mod_sel <= #1 0 ; // 2: 在调试时, 强制设为Command模式 2: mipi_mod_sel <= #1 1 ; default: mipi_mod_sel <= #1 mcuCfg_mipi_mod_sel ; endcase // MCU设置2828 mipi_Cmd_if_bus_type <= #1 mcuCfg_mipi_Cmd_if_bus_type ; // 寄存器0x50h bit1 // MCU设置fpga Cmd数据方式 Cmd_dat_tx_mod <= #1 mcuCfg_Cmd_dat_tx_mod ; // 寄存器0x65h bit2-0 // MCU读写2828操作 CmdIf_eclk_frq <= #1 mcuCfg_CmdIf_eclk_frq ; // 寄存器0x51h bit4-2 CmdIf_op_type <= #1 mcuCfg_CmdIf_op_type ; // 寄存器0x51h bit1-0 CmdIf_op_ena <= #1 mcuCfg_CmdIf_op_ena ; // 寄存器0x57h bit0 CmdIf_reg <= #1 mcuCfg_CmdIf_reg ; // 寄存器0x53h CmdIf_wr_dat[15:0] <= #1 mcuCfg_CmdIf_wr_param ; // 寄存器0x54/55h CmdIf_wr_dat[23:16] <= #1 0 ; CmdIf_wr_dat1[15:0] <= #1 mcuCfg_CmdIf_wr_param ; // 寄存器0x54/55h CmdIf_wr_dat1[23:16] <= #1 0 ; mcuCfg_CmdIf_rd_param_ch1 <= #1 w_CmdIf_rd_dat0[15:0] ; // 寄存器0x63/64h mcuCfg_CmdIf_rd_param_ch2 <= #1 w_CmdIf_rd_dat1[15:0] ; // 寄存器0x63/64h mcuCfg_CmdIf_rd_param_ch3 <= #1 w_CmdIf_rd_dat2[15:0] ; // 寄存器0x63/64h mcuCfg_CmdIf_rd_param_ch4 <= #1 w_CmdIf_rd_dat3[15:0] ; // 寄存器0x63/64h // MCU读取CmdIf工作状态 mcuCfg_CmdIf_op_state <= #1 w_CmdIf_op_state ; // 寄存器0x52h bit1-0 mcuCfg_CmdIf_op_finish <= #1 w_CmdIf_op_finish ; // 寄存器0x52h bit7 mcuCfg_CmdIf_rw_dat_count <= #1 w_CmdIf_rw_dat_count ; // 寄存器0x70~73h end // 配置完成后启动fpga操作使能 else begin // 当启动fpga操作使能后, MCU将不能重新配置 mipi_mod_sel <= #1 mipi_mod_sel ; mipi_Cmd_if_bus_type <= #1 mipi_Cmd_if_bus_type ; Cmd_dat_tx_mod <= #1 Cmd_dat_tx_mod ; CmdIf_eclk_frq <= #1 CmdIf_eclk_frq ; CmdIf_op_type <= #1 CmdIf_op_type ; CmdIf_op_ena <= #1 CmdIf_op_ena ; CmdIf_reg <= #1 CmdIf_reg ; CmdIf_wr_dat <= #1 CmdIf_wr_dat ; CmdIf_wr_dat1 <= #1 CmdIf_wr_dat1 ; //mcuCfg_CmdIf_rd_param <= #1 mcuCfg_CmdIf_rd_param ; mcuCfg_CmdIf_op_state <= #1 mcuCfg_CmdIf_op_state ; mcuCfg_CmdIf_op_finish <= #1 mcuCfg_CmdIf_op_finish ; mcuCfg_CmdIf_rw_dat_count <= #1 mcuCfg_CmdIf_rw_dat_count ; // 如果设置为Command模式, 将进入fpga发送rgb数据状态, Cmd_if模块动作 if (mipi_mod_sel == 1) begin fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_CMD_BUF_1st_ENA; end // 否则(为video模式), 本状态机将进入停止状态, 以及Cmd_if模块将不动作 else begin fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_STOP; end end end //-------------------------------------------------------------------------------------------------------------- // State-3, 在初始化后输入第一幅lvds rgb图到Cmd_buf中 FSM_CmdCtrl_CMD_BUF_1st_ENA: begin // 当host rgb ok时,进行缓存操作 if(host_rgb_ready) begin // 使能Cmd_buf_dat poc_host_Cmd_dat_ena <= #1 1; // 当首行数据缓存到fifo中时, 则确定发2828参数或数据操作 if (host_Cmd_dat_hs_wr_done_flag) begin fsm_Cmd_ctrl <= #1 (SW_TX_BMP_PARAM_WHEN_INIT_END == 1) ? FSM_CmdCtrl_NXT_BMP_DO_CFG : FSM_CmdCtrl_FPGA_TX_DAT; end end end //-------------------------------------------------------------------------------------------------------------- // State-4, lvds rgb数据发给2828 (2828在HS状态下发数据) // Cmd_buf 读写原理是: 先写完一行, 后读该行, 以避免pclk较小时导致无数据读 // 当读无效时, 明该行数据全部读完, 则进入下一状态配置2828参数. FSM_CmdCtrl_FPGA_TX_DAT: begin // 确认2828数据位宽为24bit mipi_Cmd_if_bus_type <= #1 1; // 保持使能Cmd_buf_dat poc_host_Cmd_dat_ena <= #1 1; // 在每行参数发完后, 延迟发数据 if (cnt_hs_tx_dat_dly < HS_TX_DAT_DLY ) begin cnt_hs_tx_dat_dly <= #1 cnt_hs_tx_dat_dly + 1; fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; cs_rst <= #1 cnt_hs_tx_dat_dly == 18; end else begin // 发数据状态机 case (fsm_Cmd_tx_dat_op) // Step-0, 当fifo读有效, 进入下一状态取出数据. (因fifo写完数据后会延迟输出rd dat) FSM_CmdDat_CHK_FIFO_VAVID: begin poc_host_Cmd_dat_rd_en <= #1 0; CmdIf_wr_dat <= #1 0; CmdIf_wr_dat1 <= #1 0; CmdIf_op_ena <= #1 0; CmdIf_op_turbo <= #1 0; // 设置操作为加速模式 wait_2828_op_cnt <= #1 0; fsm_Cmd_tx_dat_op <= #1 (r1_pic_host_Cmd_dat_rd_valid)? FSM_CmdDat_RD_FIFO : FSM_CmdDat_CHK_FIFO_VAVID; end // Step-1, 当fifo读有效, 则取出当前数据, 若读无效, 示当前行数据读完, 则停止后续操作 FSM_CmdDat_RD_FIFO: begin // 设置写入2828 CmdIf_eclk_frq <= #1 3'b111; CmdIf_op_ena_buf <= #1 2'b10; CmdIf_op_turbo <= #1 1; // 设置操作为加速模式 // 当fifo读有效, 取出数据 if (r1_pic_host_Cmd_dat_rd_valid) begin if (cnt_rd_fifo_dat <= pid_hsd_true_pixel_dummy - 1)begin poc_host_Cmd_dat_rd_en <= #1 1; CmdIf_wr_dat <= #1 pid_host_Cmd_dat_out; CmdIf_wr_dat1 <= #1 pid_host_Cmd_dat_out1; CmdIf_op_type <= #1 2'b01; CmdIf_op_ena <= #1 1; cs_rst <= #1 0; fsm_Cmd_tx_dat_op <= #1 FSM_CmdDat_TX_DOING; // 计数读出个数 cnt_rd_fifo_dat <= #1 cnt_rd_fifo_dat + 1; // 是第一个数据则打开op切换标志 CmdIf_op_sw_flag <= #1 (cnt_rd_fifo_dat == 0)? 1 : 0; end // 否则示行读完, 进入操作结束状态 else begin CmdIf_op_ena <= #1 1; CmdIf_op_type <= #1 2'b11; // 设置CmdIf模块END状态 poc_host_Cmd_dat_rd_en <= #1 0; CmdIf_wr_dat <= #1 0; CmdIf_wr_dat1 <= #1 0; cnt_rd_fifo_dat <= #1 0; fsm_Cmd_tx_dat_op <= #1 FSM_CmdDat_TX_DONE; end end end // Step-2, 将当前数据发给2828, 当完成后返回Step2, 重新读fifo FSM_CmdDat_TX_DOING: begin poc_host_Cmd_dat_rd_en <= #1 0 ; CmdIf_op_ena <= #1 1 ; CmdIf_op_ena_buf <= #1 CmdIf_op_ena_buf << 1 ; // 等待操作2828 //fsm_Cmd_tx_dat_op <= #1 ( CmdIf_op_finish_flag)? FSM_CmdDat_RD_FIFO : FSM_CmdDat_TX_DOING; fsm_Cmd_tx_dat_op <= #1 FSM_CmdDat_RD_FIFO ; //modify for speedup eclk end // Step-3, 当一行数据发给2828后停止写操作 FSM_CmdDat_TX_DONE: begin CmdIf_op_ena <= #1 1; // CmdIf模块进入END状态 fsm_Cmd_tx_dat_op <= #1 FSM_CmdDat_OP_END; poc_host_Cmd_dat_rd_en <= #1 0; CmdIf_wr_dat <= #1 0; CmdIf_wr_dat1 <= #1 0; wait_2828_op_cnt <= #1 0; CmdIf_op_type <= #1 2'b11; // 设置CmdIf模块END状态 cnt_rd_fifo_dat <= #1 0; end // Step-4, 操作结束, 返回控制状态机 FSM_CmdDat_OP_END: begin CmdIf_op_ena <= #1 0; CmdIf_op_turbo <= #1 0; cnt_hs_tx_dat_dly <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_HS_DONE_CFG; fsm_Cmd_tx_dat_op <= #1 FSM_CmdDat_CHK_FIFO_VAVID; end default: begin fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_FPGA_TX_DAT; fsm_Cmd_tx_dat_op <= #1 FSM_CmdDat_CHK_FIFO_VAVID; CmdIf_op_ena <= #1 0; CmdIf_op_ena_buf <= #1 2'b10; poc_host_Cmd_dat_rd_en <= #1 0; CmdIf_wr_dat <= #1 0; CmdIf_wr_dat1 <= #1 0; wait_2828_op_cnt <= #1 0; cnt_hs_tx_dat_dly <= #1 0; end endcase end end //-------------------------------------------------------------------------------------------------------------- // State-5, 在当前行数据发完后, 相关操作和配置(2828) FSM_CmdCtrl_HS_DONE_CFG: begin // 若当前图像一帧或全部显示行发完后, 则进入帧完成操作状态 if (host_Cmd_dat_hs_disp_wr_done) begin poc_host_Cmd_dat_ena <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_BMP_DONE_CFG; end // 否则进行当前行结束后的配置和操作 else begin // 保持Cmd_buf(fifo)继续缓存数据 poc_host_Cmd_dat_ena <= #1 1; // 延迟进行配置操作 //if (cnt_hs_tx_done_cfg_dly < HS_TX_DONE_CFG_DLY ) begin if (cnt_hs_tx_done_cfg_dly < 10 ) begin cnt_hs_tx_done_cfg_dly <= #1 cnt_hs_tx_done_cfg_dly + 1; fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; end // 根据MCU或host配置的不同的mipi tx模式, 进行相应操作 else begin case (Cmd_dat_tx_mod) // 行tx模式 // (使host配置2828回LP状态) 'd0: begin // 提供host配置信息 poc_datu_dat_tx_type <= #1 0; // 2828行传输模式 poc_datu_param_type <= #1 3; // 每行传输后配置2828 // 提供host配置接口 CmdIf_eclk_frq <= #1 hostCfg_CmdIf_eclk_frq ; CmdIf_op_type <= #1 hostCfg_CmdIf_op_type ; CmdIf_op_ena <= #1 hostCfg_CmdIf_op_ena ; CmdIf_reg <= #1 hostCfg_CmdIf_reg ; CmdIf_wr_dat[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat[23:16] <= #1 0 ; CmdIf_wr_dat1[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat1[23:16] <= #1 0 ; poc_hostCfg_CmdIf_op_finish <= #1 w_CmdIf_op_finish ; // 2828数据位宽为24bit mipi_Cmd_if_bus_type <= #1 1 ; // 使能host配置 // 当host配置完成, 则本操作结束, 进入下一行配置状态 if (host_cfg_datu_param_done_flag) begin poc_host_cfg_datu_param_ena <= #1 0; cnt_hs_tx_done_cfg_dly <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_WAIT_NXT_HS_BUF_DONE; end else begin poc_host_cfg_datu_param_ena <= #1 1; cnt_hs_tx_done_cfg_dly <= #1 cnt_hs_tx_done_cfg_dly; fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; end end // 帧tx模式 // (目前无需配置2828) 'd1: begin poc_host_cfg_datu_param_ena <= #1 0; cnt_hs_tx_done_cfg_dly <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_WAIT_NXT_HS_BUF_DONE; end endcase end end end //-------------------------------------------------------------------------------------------------------------- // State-6, 等待下一行数据缓存好后进行下一行相关操作和配置(2828) FSM_CmdCtrl_WAIT_NXT_HS_BUF_DONE: begin // 保持Cmd_buf(fifo)继续缓存数据 poc_host_Cmd_dat_ena <= #1 1; if (host_Cmd_dat_hs_wr_done_flag) begin fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_NXT_HS_DO_CFG; end end //-------------------------------------------------------------------------------------------------------------- // State-7, 在下一行数据发之前, 相关操作和配置(2828), 完成后重新进入数据发送状态 FSM_CmdCtrl_NXT_HS_DO_CFG: begin // 根据MCU或host配置的不同的mipi tx模式, 进行相应操作 case (Cmd_dat_tx_mod) // 行tx模式 // (使host配置2828回LP状态) 'd0: begin // 提供host配置信息 poc_datu_dat_tx_type <= #1 0; // 2828行传输模式 poc_datu_param_type <= #1 2; // 每行传输前配置2828 // 提供host配置接口 CmdIf_eclk_frq <= #1 hostCfg_CmdIf_eclk_frq ; CmdIf_op_type <= #1 hostCfg_CmdIf_op_type ; CmdIf_op_ena <= #1 hostCfg_CmdIf_op_ena ; CmdIf_reg <= #1 hostCfg_CmdIf_reg ; CmdIf_wr_dat[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat[23:16] <= #1 0 ; CmdIf_wr_dat1[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat1[23:16] <= #1 0 ; poc_hostCfg_CmdIf_op_finish <= #1 w_CmdIf_op_finish ; // 2828数据位宽为24bit mipi_Cmd_if_bus_type <= #1 1 ; // 使能host配置 // 当host配置完成, 则本操作结束, 返回数据发送状态 if (host_cfg_datu_param_done_flag) begin poc_host_cfg_datu_param_ena <= #1 0; //cnt_nxt_hs_tx_do_cfg_dly <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_FPGA_TX_DAT; end else begin poc_host_cfg_datu_param_ena <= #1 1; //cnt_nxt_hs_tx_do_cfg_dly <= #1 cnt_nxt_hs_tx_do_cfg_dly; fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; end end // 帧tx模式 // (目前无需配置2828, 保持数据发送状态) 'd1: begin poc_host_cfg_datu_param_ena <= #1 0; //cnt_nxt_hs_tx_do_cfg_dly <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_FPGA_TX_DAT; end endcase end //-------------------------------------------------------------------------------------------------------------- // State-8, 在当前图片(一帧 或 所要显示的全部行)发完后, 相关操作和配置(2828) FSM_CmdCtrl_BMP_DONE_CFG: begin // 关闭Cmd_buf(fifo)缓存数据 poc_host_Cmd_dat_ena <= #1 0; // 延迟进行配置操作 if (cnt_vs_tx_done_cfg_dly < VS_TX_DONE_CFG_DLY ) begin cnt_vs_tx_done_cfg_dly <= #1 cnt_vs_tx_done_cfg_dly + 1; fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; end // 根据MCU或host配置的不同的mipi tx模式, 进行相应操作 else begin case (Cmd_dat_tx_mod) // 行tx模式 // (使host配置2828回LP状态) 'd0, 'd1: begin // 提供host配置信息 poc_datu_dat_tx_type <= #1 0; // 2828行传输模式 poc_datu_param_type <= #1 3; // 每行传输后配置2828 // 提供host配置接口 CmdIf_eclk_frq <= #1 hostCfg_CmdIf_eclk_frq ; CmdIf_op_type <= #1 hostCfg_CmdIf_op_type ; CmdIf_op_ena <= #1 hostCfg_CmdIf_op_ena ; CmdIf_reg <= #1 hostCfg_CmdIf_reg ; CmdIf_wr_dat[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat[23:16] <= #1 0 ; CmdIf_wr_dat1[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat1[23:16] <= #1 0 ; poc_hostCfg_CmdIf_op_finish <= #1 w_CmdIf_op_finish ; // 2828数据位宽为24bit mipi_Cmd_if_bus_type <= #1 1 ; // 使能host配置 // 当host配置完成, 则本操作结束, 进入检测切图状态 if (host_cfg_datu_param_done_flag) begin poc_host_cfg_datu_param_ena <= #1 0; cnt_vs_tx_done_cfg_dly <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_CHK_NXT_BMP; end else begin poc_host_cfg_datu_param_ena <= #1 1; cnt_vs_tx_done_cfg_dly <= #1 cnt_vs_tx_done_cfg_dly; fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; end end endcase end end //-------------------------------------------------------------------------------------------------------------- // State-9, 检测是否有下一图片 (检测切图) FSM_CmdCtrl_CHK_NXT_BMP: begin // 保持关闭Cmd_buf(fifo)缓存数据 poc_host_Cmd_dat_ena <= #1 0; // 若有下一图片则进入帧/切图配置相关状态 if (host_qietu_done_flag) begin fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_WAIT_NXT_BMP_BUF_DONE; end else begin // MCU设置2828 mipi_Cmd_if_bus_type <= #1 mcuCfg_mipi_Cmd_if_bus_type ; // 寄存器0x50h bit1 // MCU设置fpga Cmd数据方式 Cmd_dat_tx_mod <= #1 mcuCfg_Cmd_dat_tx_mod ; // 寄存器0x65h bit2-0 // MCU读写2828操作 CmdIf_eclk_frq <= #1 mcuCfg_CmdIf_eclk_frq ; // 寄存器0x51h bit4-2 CmdIf_op_type <= #1 mcuCfg_CmdIf_op_type ; // 寄存器0x51h bit1-0 CmdIf_op_ena <= #1 mcuCfg_CmdIf_op_ena ; // 寄存器0x57h bit0 CmdIf_reg <= #1 mcuCfg_CmdIf_reg ; // 寄存器0x53h CmdIf_wr_dat[15:0] <= #1 mcuCfg_CmdIf_wr_param[15:0] ; // 寄存器0x54/55h CmdIf_wr_dat[23:16] <= #1 0 ; CmdIf_wr_dat1[15:0] <= #1 mcuCfg_CmdIf_wr_param[15:0] ; // 寄存器0x54/55h CmdIf_wr_dat1[23:16] <= #1 0 ; mcuCfg_CmdIf_rd_param_ch1 <= #1 w_CmdIf_rd_dat0[15:0] ; // 寄存器0x63/64h mcuCfg_CmdIf_rd_param_ch2 <= #1 w_CmdIf_rd_dat1[15:0] ; // 寄存器0x63/64h mcuCfg_CmdIf_rd_param_ch3 <= #1 w_CmdIf_rd_dat2[15:0] ; // 寄存器0x63/64h mcuCfg_CmdIf_rd_param_ch4 <= #1 w_CmdIf_rd_dat3[15:0] ; // 寄存器0x63/64h // MCU读取CmdIf工作状态 mcuCfg_CmdIf_op_state <= #1 w_CmdIf_op_state ; // 寄存器0x52h bit1-0 mcuCfg_CmdIf_op_finish <= #1 w_CmdIf_op_finish ; // 寄存器0x52h bit7 mcuCfg_CmdIf_rw_dat_count <= #1 w_CmdIf_rw_dat_count ; // 寄存器0x70~73h end end //-------------------------------------------------------------------------------------------------------------- // State-10, 等待下一图片的首行数据缓存好后进行相关操作和配置(2828) FSM_CmdCtrl_WAIT_NXT_BMP_BUF_DONE: begin // 使能Cmd_buf(fifo)缓存数据 poc_host_Cmd_dat_ena <= #1 1; if (host_Cmd_dat_hs_wr_done_flag) begin fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_NXT_BMP_DO_CFG; end end //-------------------------------------------------------------------------------------------------------------- // State-11, 在下一图片数据发之前, 相关操作和配置(2828)(切图配置), 完成后进入数据发送状态 FSM_CmdCtrl_NXT_BMP_DO_CFG: begin // 根据MCU或host配置的不同的mipi tx模式, 进行相应操作 // 提供host配置接口 CmdIf_eclk_frq <= #1 hostCfg_CmdIf_eclk_frq ; CmdIf_op_type <= #1 hostCfg_CmdIf_op_type ; CmdIf_op_ena <= #1 hostCfg_CmdIf_op_ena ; CmdIf_reg <= #1 hostCfg_CmdIf_reg ; CmdIf_wr_dat[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat[23:16] <= #1 0 ; CmdIf_wr_dat1[15:0] <= #1 hostCfg_CmdIf_wr_param ; CmdIf_wr_dat1[23:16] <= #1 0 ; poc_hostCfg_CmdIf_op_finish <= #1 w_CmdIf_op_finish ; // 2828数据位宽为24bit mipi_Cmd_if_bus_type <= #1 1 ; // 使能host配置 // 当host配置完成, 则本操作结束, 进入数据传输状态 if (host_cfg_datu_param_done_flag) begin poc_host_cfg_datu_param_ena <= #1 0; //cnt_vs_tx_do_cfg_dly <= #1 0; fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_FPGA_TX_DAT; end else begin poc_host_cfg_datu_param_ena <= #1 1; //cnt_vs_tx_do_cfg_dly <= #1 cnt_vs_tx_do_cfg_dly; fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; end // 传输模式设置 case (Cmd_dat_tx_mod) // 行tx模式 'd0: begin poc_datu_dat_tx_type <= #1 0; // 2828行传输模式 poc_datu_param_type <= #1 0; // 每帧传输前配置2828 (切图传下一图时用) end // 帧tx模式 'd1: begin poc_datu_dat_tx_type <= #1 1; // 2828帧传输模式 poc_datu_param_type <= #1 0; // 每帧传输前配置2828 (切图传下一图时用) end endcase end //-------------------------------------------------------------------------------------------------------------- // State-12, 停止状态 FSM_CmdCtrl_STOP: begin fsm_Cmd_ctrl <= #1 fsm_Cmd_ctrl; end //-------------------------------------------------------------------------------------------------------------- default: begin fsm_Cmd_ctrl <= #1 FSM_CmdCtrl_SEL_INIT_SRC; end endcase 这个代码的功能,用途,操作逻辑,状态切换逻辑,和详细的代码讲解
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07-11
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