超前进位加法器(32位)

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity adder32 is
    port(
        a, b: in std_logic_vector(31 downto 0);
        s: out std_logic_vector(31 downto 0)
    );
end entity adder32;   

architecture adder32_behiv of adder32 is
signal p : std_logic_vector(31 downto 0);
signal q : std_logic_vector(31 downto 0);
signal c : std_logic_vector(31 downto 0);
begin

        p <= a and b;
        q <= a or b;

。。。。。。。。。。。。(C代码生成的文件填入此处)

        s <= p xor q xor (c(30 downto 0) & "0");
       
end architecture adder32_behiv;

 

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