STM32一个Timer输出4路不同频率、可调占空比的PWM

最新推荐文章于 2025-06-23 11:05:34 发布

dazhou158

最新推荐文章于 2025-06-23 11:05:34 发布

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分类专栏： STM32F4 文章标签： STM32 定时器 Timer PWM 可调频率占空比

本文链接：https://blog.youkuaiyun.com/dazhou158/article/details/8796348

该博客提供了一个STM32应用示例，使用TIM3配置为输出比较定时器模式，生成4路不同频率且占空比可调的PWM信号。通过设置不同的比较寄存器值，实现PD.12到PD.15引脚上4个频率的PWM输出：4.57 Hz, 9.15 Hz, 18.31 Hz 和 36.62 Hz。代码包括STM32F4xx的中断处理程序和配置文件，适用于STM32F4xx Devices Revision A。" 138964768,10817816,yocto项目：精简镜像包的策略与技巧,"['Linux', '嵌入式开发', 'yocto项目', '系统优化', '包管理']

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源码下载地址：http://download.youkuaiyun.com/detail/dazhou158/5253187

main.c

/*********************************************
    标题：操作USART的练习
    软件平台：MDK-ARM Standard Version4.70
    硬件平台：stm32f4-discovery	
    主频：168M
	Periph_Driver_version: V1.0.0
    
    描述：用一个定时器(TIM3)，实现四路不同频率、占空比可调的PWM
		  代码参考自STM32F4-Discovery_FW_V1.1.0\Project\Peripheral_Examples\TIM_TimeBase

    author：大舟
    data：2013-04-13
**********************************************/

#include "stm32f4_discovery.h"



TIM_TimeBaseInitTypeDef  TIM_TimeBaseStructure;
TIM_OCInitTypeDef  TIM_OCInitStructure;
__IO uint16_t CCR1_Val = 5000;//54618
__IO uint16_t CCR2_Val = 27309;
__IO uint16_t CCR3_Val = 13654;
__IO uint16_t CCR4_Val = 6826;
uint16_t PrescalerValue = 0;

void TIM_Config(void);


int main(void)
{
  /*!< At this stage the microcontroller clock setting is already configured, 
       this is done through SystemInit() function which is called from startup
       file (startup_stm32f4xx.s) before to branch to application main.
       To reconfigure the default setting of SystemInit() function, refer to
       system_stm32f4xx.c file
     */

  /* TIM Configuration */
  TIM_Config();

  /** -----------------------------------------------------------------------
    TIM3 Configuration: Output Compare Timing Mode:
    
    In this example TIM3 input clock (TIM3CLK) is set to 2 * APB1 clock (PCLK1), 
    since APB1 prescaler is different from 1.   
      TIM3CLK = 2 * PCLK1  
      PCLK1 = HCLK / 4 
      => TIM3CLK = HCLK / 2 = SystemCoreClock /2
          
    To get TIM3 counter clock at 500 KHz, the prescaler is computed as follows:
       Prescaler = (TIM3CLK / TIM3 counter clock) - 1
       Prescaler = ((SystemCoreClock /2) /50 MHz) - 1
                                              
    CC1 update rate = TIM3 counter clock / CCR1_Val = 9.154 Hz	@note 上面已经将CCR1_Val改为了5000，具体频率，见中断的注释
    ==> Toggling frequency = 4.57 Hz
    
    C2 update rate = TIM3 counter clock / CCR2_Val = 18.31 Hz
    ==> Toggling frequency = 9.15 Hz
    
    CC3 update rate = TIM3 counter clock / CCR3_Val = 36.62 Hz
    ==> Toggling frequency = 18.31 Hz
    
    CC4 update rate = TIM3 counter clock / CCR4_Val = 73.25 Hz
    ==> Toggling frequency = 36.62 Hz

    Note: 
     SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f4xx.c file.
     Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate()
     function to update SystemCoreClock variable value. Otherwise, any configuration
     based on this variable will be incorrect.    
  --------------------------------