Rain的专栏

MIPS汇编指令 ============ Arithmetic Instructions abs    des, src1        # des gets the absolute value of src1. add(u) des, src1, src2  # des gets src1 + src2. addi   $t2,$t3,5        # $t2 = $t

Recently I have tried to implement a program to manage my system services. In fact, this is a server-side program, I want it to be a multiple thread program to process multiple requests from client. T

MIPS32的内部寄存器 基础知识介绍：   MIPS32的内部寄存器。 最简单的办法就是通过GDB的命令，可以获得下面的列表 (gdb) info registers           zero       at       v0       v1       a0       a1       a2       a3  R0   00

http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/ There are two sets of notes, so far. They're the only ones withlinks, so click on them. The others are titles of notes I planto write over time. Y

MIPS cache指令  MIPS cache指令： 指令编码： 31...26        25...21     20...16    15......0 CACHE(101111)  base        op          offset 格式： cache op，offset(base) 执行op制定的cace操作，16位的offset经符号

MIPS Assembly/MIPS Details From Wikibooks, open books for an open world Jump to: navigation, search MIPS Assembly Contents     1 Registers     2 Instruction Formats         2.1 R Instruct

http://www.cs.cornell.edu/courses/cs3410/2015sp/ MIPS32™ Architecture For Programmers Volume I Volume II Volume III

http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Mips/stack.html Understanding the Stack Introduction Assembly languages provide you the ability to implementconditional statements. If yo

Linux MI Linux MIPS Porting Guide I want your feedback: info, errors, spelling, dead links, comments, or even compliments :-) Prefix This document reflects what I have learned through portin

Linux/MIPS HOWTO Ralf Bächle, ralf@gnu.org July 30, 2002 This FAQ describes the MIPS port of the Linux operating system, commonproblems and their solutions, availability and more. It also tries

第一章 MIPS CPU 体系结构概述 陈怀临先生 1。序言 本文介绍MIPS体系结构，着重于其寄存器约定，MMU及存储管理，异常和中断处理等等。 通过本文，希望能提供一个基本的轮廓概念给对MIPS CPU及之上OS有兴趣的读者。 并能开始阅读更详细的归约(SPECIFICATION)资料。 MIPS是最早的，最成功的RISC(Reduced Instruction Set Compu

关于Linux上下文切换 1. 内核栈切换 (MIPS) 调度切换至一个进程时，根据 task_struct->thread_info 的值设置 *kernelsp（当前正在运行进程之内核栈栈底），其值为 thread_info + THREAD_SIZE - 32（MIPS 下，使用 set_saved_sp 宏）。 2. 异常、中断寄存器的保存 (MIPS) 使用SAVE_SOME

what is cpu_save_nonscratch and cpu_restore_nonscratch? In context swith, it will call to resume which is define in assembly language in arch/mips/kernel/r2300_switch.S . here it will save s