_dl_start_user源码分析(一)

本文详细剖析了_dl_start_user函数的实现原理,包括其如何处理应用程序的启动过程、参数传递及初始化流程。重点介绍了_dl_start_user如何通过调用_dl_init函数来完成动态链接库的初始化工作。

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_dl_start_user源码分析(一)

在上面几章的分析中,_dl_start_final函数的返回值为_dl_start_user函数指针,最后调用该函数,下面来看,
sysdeps/x86_64/dl-machine.h
_dl_start_user

#define RTLD_START asm ("\n\
.text\n\
    .align 16\n\
.globl _start\n\
.globl _dl_start_user\n\
_start:\n\
    movq %rsp, %rdi\n\
    call _dl_start\n\
_dl_start_user:\n\
    movq %rax, %r12\n\
    movl _dl_skip_args(%rip), %eax\n\
    popq %rdx\n\
    leaq (%rsp,%rax,8), %rsp\n\
    subl %eax, %edx\n\
    pushq %rdx\n\
    movq %rdx, %rsi\n\
    movq %rsp, %r13\n\
    andq $-16, %rsp\n\
    movq _rtld_local(%rip), %rdi\n\
    leaq 16(%r13,%rdx,8), %rcx\n\
    leaq 8(%r13), %rdx\n\
    xorl %ebp, %ebp\n\
    call _dl_init_internal@PLT\n\
    leaq _dl_fini(%rip), %rdx\n\
    movq %r13, %rsp\n\
    jmp *%r12\n\
.previous\n\
");

前面的章节分析了_dl_start函数的源码,rax寄存器存放了_dl_start函数的返回值,即应用程序的入口点(注意这里不是main函数),也即后面即将分析的_start函数。接着从堆栈中取argc,即参数个数存放在rdx中。
堆栈中接下来是第一个参数的地址,_dl_skip_args中保存了堆栈中需要忽略的参数个数,将其存入rax寄存器中。当ld.so作为应用程序启动,并且包含了诸如“–list”、“–library-path”等参数,则需要忽略这些参数,即移动堆栈的指针rsp向高地址移动rax*8,也即_dl_skip_args个参数占用的堆栈空间。再往下将argc减去_dl_skip_args,得到有效参数的个数rdx,再存入堆栈中,前面的一系列操作等价于在堆栈中忽略了无效参数。
然后将前面计算的有效参数个数保存在rsi寄存器中。将当前堆栈指针rsp存入r13中,当前堆栈指针rsp指向刚刚存入的有效参数个数。接着将rsp按照16位对齐。
_rtld_local是全局的rtld_global结构指针,其第一个元素为_dl_ns数组,而LM_ID_BASE宏定义为0,因此_rtld_local指针也指向GL(dl_ns)[LM_ID_BASE]._ns_loaded,即应用程序对应的link_map指针。接着将堆栈中的环境变量存入rcx寄存器中,将堆栈中的参数argv存入rdx寄存器。然后调用_dl_init_internal函数。_dl_init_internal是_dl_init函数的别名。
接下来恢复前面保存的堆栈指针r13至rsp中,再将_dl_fini的函数地址存储在rdx中,最后执行函数的入口点,也即_start函数。

elf/dl-init.h
_dl_start_user->_dl_init

void
internal_function
_dl_init (struct link_map *main_map, int argc, char **argv, char **env)
{
  ElfW(Dyn) *preinit_array = main_map->l_info[DT_PREINIT_ARRAY];
  ElfW(Dyn) *preinit_array_size = main_map->l_info[DT_PREINIT_ARRAYSZ];
  unsigned int i;

  if (__builtin_expect (GL(dl_initfirst) != NULL, 0))
    {
      call_init (GL(dl_initfirst), argc, argv, env);
      GL(dl_initfirst) = NULL;
    }

  if (__builtin_expect (preinit_array != NULL, 0)
      && preinit_array_size != NULL
      && (i = preinit_array_size->d_un.d_val / sizeof (ElfW(Addr))) > 0)
    {
      ElfW(Addr) *addrs;
      unsigned int cnt;

      addrs = (ElfW(Addr) *) (preinit_array->d_un.d_ptr + main_map->l_addr);
      for (cnt = 0; cnt < i; ++cnt)
    ((init_t) addrs[cnt]) (argc, argv, env);
    }

  i = main_map->l_searchlist.r_nlist;
  while (i-- > 0)
    call_init (main_map->l_initfini[i], argc, argv, env);
}

_dl_init函数首先在.dynamic段中查找.preinit段的信息,存放在preinit_array地址中,后面要调用该段的函数。dl_initfirst在_dl_map_object_from_fd函数中被赋值,表示需要被预先初始化的共享库,如果存在则执行call_init函数对齐进行初始化。接下来获得preinit_array对应的初始化函数地址addrs并执行。
再往下获得应用程序main_map依赖的所有共享库个数i,循环调用call_init函数执行每个共享库的初始化函数。

elf/dl-init.h
_dl_start_user->_dl_init->call_init

static void
call_init (struct link_map *l, int argc, char **argv, char **env)
{
  if (l->l_init_called)
    return;

  l->l_init_called = 1;

  if (__builtin_expect (l->l_name[0], 'a') == '\0'
      && l->l_type == lt_executable)
    return;

  if (l->l_info[DT_INIT] == NULL
      && __builtin_expect (l->l_info[DT_INIT_ARRAY] == NULL, 1))
    return;

  if (l->l_info[DT_INIT] != NULL)
    {
      init_t init = (init_t) DL_DT_INIT_ADDRESS
    (l, l->l_addr + l->l_info[DT_INIT]->d_un.d_ptr);

      init (argc, argv, env);
    }

  ElfW(Dyn) *init_array = l->l_info[DT_INIT_ARRAY];
  if (init_array != NULL)
    {
      unsigned int j;
      unsigned int jm;
      ElfW(Addr) *addrs;

      jm = l->l_info[DT_INIT_ARRAYSZ]->d_un.d_val / sizeof (ElfW(Addr));

      addrs = (ElfW(Addr) *) (init_array->d_un.d_ptr + l->l_addr);
      for (j = 0; j < jm; ++j)
    ((init_t) addrs[j]) (argc, argv, env);
    }
}

如果共享库对应的link_map结构的l_init_called被置位,则该共享库已被初始化,直接返回,否则开始初始化该共享库,并置位l_init_called。再往下检查共享库是否是可执行类型lt_executable,并且l_name为空,此时直接返回。然后继续检查.init和.init_array段是否都为空,此时也直接返回。如果.init段不为空,则获取函数地址init并执行。如果.init_array段不为空,则获取初始化函数个数jm,然后获取函数数组addrs,最后循环执行其初始化函数。

sysdeps/x86_64/elf/start.S
_dl_start_user->_start

    .text
    .globl _start
    .type _start,@function
_start:
    xorl %ebp, %ebp

    movq %rdx, %r9
    popq %rsi
    movq %rsp, %rdx
    andq  $~15, %rsp

    pushq %rax
    pushq %rsp

    movq __libc_csu_fini@GOTPCREL(%rip), %r8
    movq __libc_csu_init@GOTPCREL(%rip), %rcx
    movq BP_SYM (main)@GOTPCREL(%rip), %rdi
    call BP_SYM (__libc_start_main)@PLT

    hlt

下面来看_dl_start_user函数最后执行的_start函数。
rdx寄存器保存了_dl_start_user函数中设置的_dl_fini函数指针。然后从堆栈中取出参数个数argc存储在rsi寄存器中。接着将当前堆栈指针rsp存入rdx寄存器中,当前堆栈指针指向argv,因此rdx寄存器中存储了argv,也即参数地址。为了按照16字节对齐,接下来向堆栈压入8个地址的无用字节用于16字节对齐,再压入8字节的rsp地址,表示用户空间堆栈的最高地址。然后设置__libc_csu_fini函数地址至r8寄存器中,再设置__libc_csu_init的函数地址至rcx寄存器中,然后将应用程序的main函数存入rdi寄存器中,最后调用__libc_start_main函数。

/* * Copyright (c) 2023, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * ============ ti_msp_dl_config.c ============= * Configured MSPM0 DriverLib module definitions * * DO NOT EDIT - This file is generated for the MSPM0G350X * by the SysConfig tool. */ #include "ti_msp_dl_config.h" DL_TimerA_backupConfig gTIMER_0Backup; /* * ======== SYSCFG_DL_init ======== * Perform any initialization needed before using any board APIs */ SYSCONFIG_WEAK void SYSCFG_DL_init(void) { SYSCFG_DL_initPower(); SYSCFG_DL_GPIO_init(); /* Module-Specific Initializations*/ SYSCFG_DL_SYSCTL_init(); SYSCFG_DL_PWM_0_init(); SYSCFG_DL_TIMER_0_init(); SYSCFG_DL_UART_IMU601_init(); SYSCFG_DL_UART_0_init(); /* Ensure backup structures have no valid state */ gTIMER_0Backup.backupRdy = false; } /* * User should take care to save and restore register configuration in application. * See Retention Configuration section for more details. */ SYSCONFIG_WEAK bool SYSCFG_DL_saveConfiguration(void) { bool retStatus = true; retStatus &= DL_TimerA_saveConfiguration(TIMER_0_INST, &gTIMER_0Backup); return retStatus; } SYSCONFIG_WEAK bool SYSCFG_DL_restoreConfiguration(void) { bool retStatus = true; retStatus &= DL_TimerA_restoreConfiguration(TIMER_0_INST, &gTIMER_0Backup, false); return retStatus; } SYSCONFIG_WEAK void SYSCFG_DL_initPower(void) { DL_GPIO_reset(GPIOA); DL_GPIO_reset(GPIOB); DL_TimerG_reset(PWM_0_INST); DL_TimerA_reset(TIMER_0_INST); DL_UART_Main_reset(UART_IMU601_INST); DL_UART_Main_reset(UART_0_INST); DL_GPIO_enablePower(GPIOA); DL_GPIO_enablePower(GPIOB); DL_TimerG_enablePower(PWM_0_INST); DL_TimerA_enablePower(TIMER_0_INST); DL_UART_Main_enablePower(UART_IMU601_INST); DL_UART_Main_enablePower(UART_0_INST); delay_cycles(POWER_STARTUP_DELAY); } SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void) { DL_GPIO_initPeripheralOutputFunction(GPIO_PWM_0_C0_IOMUX,GPIO_PWM_0_C0_IOMUX_FUNC); DL_GPIO_enableOutput(GPIO_PWM_0_C0_PORT, GPIO_PWM_0_C0_PIN); DL_GPIO_initPeripheralOutputFunction(GPIO_PWM_0_C1_IOMUX,GPIO_PWM_0_C1_IOMUX_FUNC); DL_GPIO_enableOutput(GPIO_PWM_0_C1_PORT, GPIO_PWM_0_C1_PIN); DL_GPIO_initPeripheralOutputFunction( GPIO_UART_IMU601_IOMUX_TX, GPIO_UART_IMU601_IOMUX_TX_FUNC); DL_GPIO_initPeripheralInputFunction( GPIO_UART_IMU601_IOMUX_RX, GPIO_UART_IMU601_IOMUX_RX_FUNC); DL_GPIO_initPeripheralOutputFunction( GPIO_UART_0_IOMUX_TX, GPIO_UART_0_IOMUX_TX_FUNC); DL_GPIO_initPeripheralInputFunction( GPIO_UART_0_IOMUX_RX, GPIO_UART_0_IOMUX_RX_FUNC); DL_GPIO_initDigitalOutput(GPIO_LED_PIN_0_IOMUX); DL_GPIO_initDigitalOutputFeatures(GPIO_OLED_PIN_SDA_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_DRIVE_STRENGTH_LOW, DL_GPIO_HIZ_DISABLE); DL_GPIO_initDigitalOutputFeatures(GPIO_OLED_PIN_SCL_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_DRIVE_STRENGTH_LOW, DL_GPIO_HIZ_DISABLE); DL_GPIO_setPins(GPIOA, GPIO_LED_PIN_0_PIN | GPIO_OLED_PIN_SDA_PIN | GPIO_OLED_PIN_SCL_PIN); DL_GPIO_enableOutput(GPIOA, GPIO_LED_PIN_0_PIN | GPIO_OLED_PIN_SDA_PIN | GPIO_OLED_PIN_SCL_PIN); } static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = { .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ, .rDivClk2x = 3, .rDivClk1 = 1, .rDivClk0 = 0, .enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_ENABLE, .enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_DISABLE, .enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE, .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK2X, .sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC, .qDiv = 9, .pDiv = DL_SYSCTL_SYSPLL_PDIV_2 }; SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void) { //Low Power Mode is configured to be SLEEP0 DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0); DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2); DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE); /* Set default configuration */ DL_SYSCTL_disableHFXT(); DL_SYSCTL_disableSYSPLL(); DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig); DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2); DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL); } /* * Timer clock configuration to be sourced by / 8 (5000000 Hz) * timerClkFreq = (timerClkSrc / (timerClkDivRatio * (timerClkPrescale + 1))) * 20000 Hz = 5000000 Hz / (8 * (249 + 1)) */ static const DL_TimerG_ClockConfig gPWM_0ClockConfig = { .clockSel = DL_TIMER_CLOCK_BUSCLK, .divideRatio = DL_TIMER_CLOCK_DIVIDE_8, .prescale = 249U }; static const DL_TimerG_PWMConfig gPWM_0Config = { .pwmMode = DL_TIMER_PWM_MODE_EDGE_ALIGN, .period = 400, .isTimerWithFourCC = false, .startTimer = DL_TIMER_START, }; SYSCONFIG_WEAK void SYSCFG_DL_PWM_0_init(void) { DL_TimerG_setClockConfig( PWM_0_INST, (DL_TimerG_ClockConfig *) &gPWM_0ClockConfig); DL_TimerG_initPWMMode( PWM_0_INST, (DL_TimerG_PWMConfig *) &gPWM_0Config); // Set Counter control to the smallest CC index being used DL_TimerG_setCounterControl(PWM_0_INST,DL_TIMER_CZC_CCCTL0_ZCOND,DL_TIMER_CAC_CCCTL0_ACOND,DL_TIMER_CLC_CCCTL0_LCOND); DL_TimerG_setCaptureCompareOutCtl(PWM_0_INST, DL_TIMER_CC_OCTL_INIT_VAL_LOW, DL_TIMER_CC_OCTL_INV_OUT_ENABLED, DL_TIMER_CC_OCTL_SRC_FUNCVAL, DL_TIMERG_CAPTURE_COMPARE_0_INDEX); DL_TimerG_setCaptCompUpdateMethod(PWM_0_INST, DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE, DL_TIMERG_CAPTURE_COMPARE_0_INDEX); DL_TimerG_setCaptureCompareValue(PWM_0_INST, 400, DL_TIMER_CC_0_INDEX); DL_TimerG_setCaptureCompareOutCtl(PWM_0_INST, DL_TIMER_CC_OCTL_INIT_VAL_LOW, DL_TIMER_CC_OCTL_INV_OUT_ENABLED, DL_TIMER_CC_OCTL_SRC_FUNCVAL, DL_TIMERG_CAPTURE_COMPARE_1_INDEX); DL_TimerG_setCaptCompUpdateMethod(PWM_0_INST, DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE, DL_TIMERG_CAPTURE_COMPARE_1_INDEX); DL_TimerG_setCaptureCompareValue(PWM_0_INST, 400, DL_TIMER_CC_1_INDEX); DL_TimerG_enableClock(PWM_0_INST); DL_TimerG_setCCPDirection(PWM_0_INST , DL_TIMER_CC0_OUTPUT | DL_TIMER_CC1_OUTPUT ); } /* * Timer clock configuration to be sourced by BUSCLK / (10000000 Hz) * timerClkFreq = (timerClkSrc / (timerClkDivRatio * (timerClkPrescale + 1))) * 1000000 Hz = 10000000 Hz / (8 * (9 + 1)) */ static const DL_TimerA_ClockConfig gTIMER_0ClockConfig = { .clockSel = DL_TIMER_CLOCK_BUSCLK, .divideRatio = DL_TIMER_CLOCK_DIVIDE_8, .prescale = 9U, }; /* * Timer load value (where the counter starts from) is calculated as (timerPeriod * timerClockFreq) - 1 * TIMER_0_INST_LOAD_VALUE = (20 ms * 1000000 Hz) - 1 */ static const DL_TimerA_TimerConfig gTIMER_0TimerConfig = { .period = TIMER_0_INST_LOAD_VALUE, .timerMode = DL_TIMER_TIMER_MODE_PERIODIC, .startTimer = DL_TIMER_START, }; SYSCONFIG_WEAK void SYSCFG_DL_TIMER_0_init(void) { DL_TimerA_setClockConfig(TIMER_0_INST, (DL_TimerA_ClockConfig *) &gTIMER_0ClockConfig); DL_TimerA_initTimerMode(TIMER_0_INST, (DL_TimerA_TimerConfig *) &gTIMER_0TimerConfig); DL_TimerA_enableInterrupt(TIMER_0_INST , DL_TIMERA_INTERRUPT_ZERO_EVENT); NVIC_SetPriority(TIMER_0_INST_INT_IRQN, 0); DL_TimerA_enableClock(TIMER_0_INST); } static const DL_UART_Main_ClockConfig gUART_IMU601ClockConfig = { .clockSel = DL_UART_MAIN_CLOCK_BUSCLK, .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1 }; static const DL_UART_Main_Config gUART_IMU601Config = { .mode = DL_UART_MAIN_MODE_NORMAL, .direction = DL_UART_MAIN_DIRECTION_TX_RX, .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE, .parity = DL_UART_MAIN_PARITY_NONE, .wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS, .stopBits = DL_UART_MAIN_STOP_BITS_ONE }; SYSCONFIG_WEAK void SYSCFG_DL_UART_IMU601_init(void) { DL_UART_Main_setClockConfig(UART_IMU601_INST, (DL_UART_Main_ClockConfig *) &gUART_IMU601ClockConfig); DL_UART_Main_init(UART_IMU601_INST, (DL_UART_Main_Config *) &gUART_IMU601Config); /* * Configure baud rate by setting oversampling and baud rate divisors. * Target baud rate: 115200 * Actual baud rate: 115190.78 */ DL_UART_Main_setOversampling(UART_IMU601_INST, DL_UART_OVERSAMPLING_RATE_16X); DL_UART_Main_setBaudRateDivisor(UART_IMU601_INST, UART_IMU601_IBRD_40_MHZ_115200_BAUD, UART_IMU601_FBRD_40_MHZ_115200_BAUD); /* Configure Interrupts */ DL_UART_Main_enableInterrupt(UART_IMU601_INST, DL_UART_MAIN_INTERRUPT_RX); DL_UART_Main_enable(UART_IMU601_INST); } static const DL_UART_Main_ClockConfig gUART_0ClockConfig = { .clockSel = DL_UART_MAIN_CLOCK_BUSCLK, .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1 }; static const DL_UART_Main_Config gUART_0Config = { .mode = DL_UART_MAIN_MODE_NORMAL, .direction = DL_UART_MAIN_DIRECTION_TX_RX, .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE, .parity = DL_UART_MAIN_PARITY_NONE, .wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS, .stopBits = DL_UART_MAIN_STOP_BITS_ONE }; SYSCONFIG_WEAK void SYSCFG_DL_UART_0_init(void) { DL_UART_Main_setClockConfig(UART_0_INST, (DL_UART_Main_ClockConfig *) &gUART_0ClockConfig); DL_UART_Main_init(UART_0_INST, (DL_UART_Main_Config *) &gUART_0Config); /* * Configure baud rate by setting oversampling and baud rate divisors. * Target baud rate: 115200 * Actual baud rate: 115190.78 */ DL_UART_Main_setOversampling(UART_0_INST, DL_UART_OVERSAMPLING_RATE_16X); DL_UART_Main_setBaudRateDivisor(UART_0_INST, UART_0_IBRD_40_MHZ_115200_BAUD, UART_0_FBRD_40_MHZ_115200_BAUD); /* Configure Interrupts */ DL_UART_Main_enableInterrupt(UART_0_INST, DL_UART_MAIN_INTERRUPT_RX); DL_UART_Main_enable(UART_0_INST); } /* * Copyright (c) 2023, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* * ============ ti_msp_dl_config.c ============= * Configured MSPM0 DriverLib module definitions * * DO NOT EDIT - This file is generated for the MSPM0G350X * by the SysConfig tool. */ #include "ti_msp_dl_config.h" DL_TimerG_backupConfig gPWM_MOTOR_LEFTBackup; DL_TimerA_backupConfig gPWM_MOTOR_RIGHTBackup; DL_TimerA_backupConfig gTIMER_0Backup; DL_SPI_backupConfig gSPI_0Backup; /* * ======== SYSCFG_DL_init ======== * Perform any initialization needed before using any board APIs */ SYSCONFIG_WEAK void SYSCFG_DL_init(void) { SYSCFG_DL_initPower(); SYSCFG_DL_GPIO_init(); /* Module-Specific Initializations*/ SYSCFG_DL_SYSCTL_init(); SYSCFG_DL_PWM_MOTOR_LEFT_init(); SYSCFG_DL_PWM_MOTOR_RIGHT_init(); SYSCFG_DL_TIMER_0_init(); SYSCFG_DL_UART_K230_init(); SYSCFG_DL_UART_IMU601_init(); SYSCFG_DL_UART_HC05_init(); SYSCFG_DL_SPI_0_init(); /* Ensure backup structures have no valid state */ gPWM_MOTOR_LEFTBackup.backupRdy = false; gPWM_MOTOR_RIGHTBackup.backupRdy = false; gTIMER_0Backup.backupRdy = false; gSPI_0Backup.backupRdy = false; } /* * User should take care to save and restore register configuration in application. * See Retention Configuration section for more details. */ SYSCONFIG_WEAK bool SYSCFG_DL_saveConfiguration(void) { bool retStatus = true; retStatus &= DL_TimerG_saveConfiguration(PWM_MOTOR_LEFT_INST, &gPWM_MOTOR_LEFTBackup); retStatus &= DL_TimerA_saveConfiguration(PWM_MOTOR_RIGHT_INST, &gPWM_MOTOR_RIGHTBackup); retStatus &= DL_TimerA_saveConfiguration(TIMER_0_INST, &gTIMER_0Backup); retStatus &= DL_SPI_saveConfiguration(SPI_0_INST, &gSPI_0Backup); return retStatus; } SYSCONFIG_WEAK bool SYSCFG_DL_restoreConfiguration(void) { bool retStatus = true; retStatus &= DL_TimerG_restoreConfiguration(PWM_MOTOR_LEFT_INST, &gPWM_MOTOR_LEFTBackup, false); retStatus &= DL_TimerA_restoreConfiguration(PWM_MOTOR_RIGHT_INST, &gPWM_MOTOR_RIGHTBackup, false); retStatus &= DL_TimerA_restoreConfiguration(TIMER_0_INST, &gTIMER_0Backup, false); retStatus &= DL_SPI_restoreConfiguration(SPI_0_INST, &gSPI_0Backup); return retStatus; } SYSCONFIG_WEAK void SYSCFG_DL_initPower(void) { DL_GPIO_reset(GPIOA); DL_GPIO_reset(GPIOB); DL_TimerG_reset(PWM_MOTOR_LEFT_INST); DL_TimerA_reset(PWM_MOTOR_RIGHT_INST); DL_TimerA_reset(TIMER_0_INST); DL_UART_Main_reset(UART_K230_INST); DL_UART_Main_reset(UART_IMU601_INST); DL_UART_Main_reset(UART_HC05_INST); DL_SPI_reset(SPI_0_INST); DL_GPIO_enablePower(GPIOA); DL_GPIO_enablePower(GPIOB); DL_TimerG_enablePower(PWM_MOTOR_LEFT_INST); DL_TimerA_enablePower(PWM_MOTOR_RIGHT_INST); DL_TimerA_enablePower(TIMER_0_INST); DL_UART_Main_enablePower(UART_K230_INST); DL_UART_Main_enablePower(UART_IMU601_INST); DL_UART_Main_enablePower(UART_HC05_INST); DL_SPI_enablePower(SPI_0_INST); delay_cycles(POWER_STARTUP_DELAY); } SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void) { DL_GPIO_initPeripheralOutputFunction(GPIO_PWM_MOTOR_LEFT_C0_IOMUX,GPIO_PWM_MOTOR_LEFT_C0_IOMUX_FUNC); DL_GPIO_enableOutput(GPIO_PWM_MOTOR_LEFT_C0_PORT, GPIO_PWM_MOTOR_LEFT_C0_PIN); DL_GPIO_initPeripheralOutputFunction(GPIO_PWM_MOTOR_RIGHT_C1_IOMUX,GPIO_PWM_MOTOR_RIGHT_C1_IOMUX_FUNC); DL_GPIO_enableOutput(GPIO_PWM_MOTOR_RIGHT_C1_PORT, GPIO_PWM_MOTOR_RIGHT_C1_PIN); DL_GPIO_initPeripheralOutputFunction( GPIO_UART_K230_IOMUX_TX, GPIO_UART_K230_IOMUX_TX_FUNC); DL_GPIO_initPeripheralInputFunction( GPIO_UART_K230_IOMUX_RX, GPIO_UART_K230_IOMUX_RX_FUNC); DL_GPIO_initPeripheralOutputFunction( GPIO_UART_IMU601_IOMUX_TX, GPIO_UART_IMU601_IOMUX_TX_FUNC); DL_GPIO_initPeripheralInputFunction( GPIO_UART_IMU601_IOMUX_RX, GPIO_UART_IMU601_IOMUX_RX_FUNC); DL_GPIO_initPeripheralOutputFunction( GPIO_UART_HC05_IOMUX_TX, GPIO_UART_HC05_IOMUX_TX_FUNC); DL_GPIO_initPeripheralInputFunction( GPIO_UART_HC05_IOMUX_RX, GPIO_UART_HC05_IOMUX_RX_FUNC); DL_GPIO_initPeripheralOutputFunction( GPIO_SPI_0_IOMUX_SCLK, GPIO_SPI_0_IOMUX_SCLK_FUNC); DL_GPIO_initPeripheralOutputFunction( GPIO_SPI_0_IOMUX_PICO, GPIO_SPI_0_IOMUX_PICO_FUNC); DL_GPIO_initPeripheralInputFunction( GPIO_SPI_0_IOMUX_POCI, GPIO_SPI_0_IOMUX_POCI_FUNC); DL_GPIO_initDigitalOutput(GPIO_LED_PIN_0_IOMUX); DL_GPIO_initDigitalOutput(CS_PIN_9_IOMUX); DL_GPIO_initDigitalOutput(GPIO_MOTOR_PIN_L1_IOMUX); DL_GPIO_initDigitalOutput(GPIO_MOTOR_PIN_L2_IOMUX); DL_GPIO_initDigitalOutput(GPIO_MOTOR_PIN_R1_IOMUX); DL_GPIO_initDigitalOutput(GPIO_MOTOR_PIN_R2_IOMUX); DL_GPIO_initDigitalOutput(GPIO_MOTOR_PIN_STBY_IOMUX); DL_GPIO_initDigitalInputFeatures(ENCODER_E1A_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_NONE, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(ENCODER_E1B_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_NONE, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(ENCODER_E2A_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_NONE, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(ENCODER_E2B_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_NONE, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_2_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_3_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_4_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_5_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_6_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_7_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_8_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(GPIO_XUNJI_PIN_1_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalOutputFeatures(GPIO_OLED_PIN_SDA_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_DRIVE_STRENGTH_LOW, DL_GPIO_HIZ_DISABLE); DL_GPIO_initDigitalOutputFeatures(GPIO_OLED_PIN_SCL_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_DRIVE_STRENGTH_LOW, DL_GPIO_HIZ_DISABLE); DL_GPIO_initDigitalInputFeatures(KEY_UP_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(KEY_DN_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(KEY_LT_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(KEY_RT_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_initDigitalInputFeatures(KEY_ME_IOMUX, DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_UP, DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE); DL_GPIO_clearPins(GPIOA, GPIO_MOTOR_PIN_R1_PIN | GPIO_MOTOR_PIN_R2_PIN); DL_GPIO_setPins(GPIOA, GPIO_LED_PIN_0_PIN | GPIO_OLED_PIN_SCL_PIN); DL_GPIO_enableOutput(GPIOA, GPIO_LED_PIN_0_PIN | GPIO_MOTOR_PIN_R1_PIN | GPIO_MOTOR_PIN_R2_PIN | GPIO_OLED_PIN_SCL_PIN); DL_GPIO_setUpperPinsPolarity(GPIOA, DL_GPIO_PIN_24_EDGE_RISE | DL_GPIO_PIN_23_EDGE_RISE); DL_GPIO_clearInterruptStatus(GPIOA, ENCODER_E2A_PIN | ENCODER_E2B_PIN); DL_GPIO_enableInterrupt(GPIOA, ENCODER_E2A_PIN | ENCODER_E2B_PIN); DL_GPIO_clearPins(GPIOB, CS_PIN_9_PIN | GPIO_MOTOR_PIN_L1_PIN | GPIO_MOTOR_PIN_L2_PIN | GPIO_MOTOR_PIN_STBY_PIN); DL_GPIO_setPins(GPIOB, GPIO_OLED_PIN_SDA_PIN); DL_GPIO_enableOutput(GPIOB, CS_PIN_9_PIN | GPIO_MOTOR_PIN_L1_PIN | GPIO_MOTOR_PIN_L2_PIN | GPIO_MOTOR_PIN_STBY_PIN | GPIO_OLED_PIN_SDA_PIN); DL_GPIO_setLowerPinsPolarity(GPIOB, DL_GPIO_PIN_6_EDGE_RISE | DL_GPIO_PIN_7_EDGE_RISE | DL_GPIO_PIN_12_EDGE_FALL | DL_GPIO_PIN_8_EDGE_FALL | DL_GPIO_PIN_9_EDGE_FALL | DL_GPIO_PIN_10_EDGE_FALL | DL_GPIO_PIN_11_EDGE_FALL); DL_GPIO_clearInterruptStatus(GPIOB, ENCODER_E1A_PIN | ENCODER_E1B_PIN | KEY_UP_PIN | KEY_DN_PIN | KEY_LT_PIN | KEY_RT_PIN | KEY_ME_PIN); DL_GPIO_enableInterrupt(GPIOB, ENCODER_E1A_PIN | ENCODER_E1B_PIN | KEY_UP_PIN | KEY_DN_PIN | KEY_LT_PIN | KEY_RT_PIN | KEY_ME_PIN); } static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = { .inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_16_32_MHZ, .rDivClk2x = 3, .rDivClk1 = 0, .rDivClk0 = 0, .enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_ENABLE, .enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_DISABLE, .enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_DISABLE, .sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK2X, .sysPLLRef = DL_SYSCTL_SYSPLL_REF_SYSOSC, .qDiv = 9, .pDiv = DL_SYSCTL_SYSPLL_PDIV_2 }; SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void) { //Low Power Mode is configured to be SLEEP0 DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0); DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2); DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE); /* Set default configuration */ DL_SYSCTL_disableHFXT(); DL_SYSCTL_disableSYSPLL(); DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig); DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2); DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL); /* INT_GROUP1 Priority */ NVIC_SetPriority(GPIOA_INT_IRQn, 0); } /* * Timer clock configuration to be sourced by / 1 (80000000 Hz) * timerClkFreq = (timerClkSrc / (timerClkDivRatio * (timerClkPrescale + 1))) * 80000000 Hz = 80000000 Hz / (1 * (0 + 1)) */ static const DL_TimerG_ClockConfig gPWM_MOTOR_LEFTClockConfig = { .clockSel = DL_TIMER_CLOCK_BUSCLK, .divideRatio = DL_TIMER_CLOCK_DIVIDE_1, .prescale = 0U }; static const DL_TimerG_PWMConfig gPWM_MOTOR_LEFTConfig = { .pwmMode = DL_TIMER_PWM_MODE_EDGE_ALIGN, .period = 3200, .isTimerWithFourCC = true, .startTimer = DL_TIMER_START, }; SYSCONFIG_WEAK void SYSCFG_DL_PWM_MOTOR_LEFT_init(void) { DL_TimerG_setClockConfig( PWM_MOTOR_LEFT_INST, (DL_TimerG_ClockConfig *) &gPWM_MOTOR_LEFTClockConfig); DL_TimerG_initPWMMode( PWM_MOTOR_LEFT_INST, (DL_TimerG_PWMConfig *) &gPWM_MOTOR_LEFTConfig); // Set Counter control to the smallest CC index being used DL_TimerG_setCounterControl(PWM_MOTOR_LEFT_INST,DL_TIMER_CZC_CCCTL0_ZCOND,DL_TIMER_CAC_CCCTL0_ACOND,DL_TIMER_CLC_CCCTL0_LCOND); DL_TimerG_setCaptureCompareOutCtl(PWM_MOTOR_LEFT_INST, DL_TIMER_CC_OCTL_INIT_VAL_LOW, DL_TIMER_CC_OCTL_INV_OUT_DISABLED, DL_TIMER_CC_OCTL_SRC_FUNCVAL, DL_TIMERG_CAPTURE_COMPARE_0_INDEX); DL_TimerG_setCaptCompUpdateMethod(PWM_MOTOR_LEFT_INST, DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE, DL_TIMERG_CAPTURE_COMPARE_0_INDEX); DL_TimerG_setCaptureCompareValue(PWM_MOTOR_LEFT_INST, 3200, DL_TIMER_CC_0_INDEX); DL_TimerG_enableClock(PWM_MOTOR_LEFT_INST); DL_TimerG_setCCPDirection(PWM_MOTOR_LEFT_INST , DL_TIMER_CC0_OUTPUT ); } /* * Timer clock configuration to be sourced by / 1 (80000000 Hz) * timerClkFreq = (timerClkSrc / (timerClkDivRatio * (timerClkPrescale + 1))) * 80000000 Hz = 80000000 Hz / (1 * (0 + 1)) */ static const DL_TimerA_ClockConfig gPWM_MOTOR_RIGHTClockConfig = { .clockSel = DL_TIMER_CLOCK_BUSCLK, .divideRatio = DL_TIMER_CLOCK_DIVIDE_1, .prescale = 0U }; static const DL_TimerA_PWMConfig gPWM_MOTOR_RIGHTConfig = { .pwmMode = DL_TIMER_PWM_MODE_EDGE_ALIGN, .period = 3200, .isTimerWithFourCC = true, .startTimer = DL_TIMER_START, }; SYSCONFIG_WEAK void SYSCFG_DL_PWM_MOTOR_RIGHT_init(void) { DL_TimerA_setClockConfig( PWM_MOTOR_RIGHT_INST, (DL_TimerA_ClockConfig *) &gPWM_MOTOR_RIGHTClockConfig); DL_TimerA_initPWMMode( PWM_MOTOR_RIGHT_INST, (DL_TimerA_PWMConfig *) &gPWM_MOTOR_RIGHTConfig); // Set Counter control to the smallest CC index being used DL_TimerA_setCounterControl(PWM_MOTOR_RIGHT_INST,DL_TIMER_CZC_CCCTL1_ZCOND,DL_TIMER_CAC_CCCTL1_ACOND,DL_TIMER_CLC_CCCTL1_LCOND); DL_TimerA_setCaptureCompareOutCtl(PWM_MOTOR_RIGHT_INST, DL_TIMER_CC_OCTL_INIT_VAL_LOW, DL_TIMER_CC_OCTL_INV_OUT_DISABLED, DL_TIMER_CC_OCTL_SRC_FUNCVAL, DL_TIMERA_CAPTURE_COMPARE_1_INDEX); DL_TimerA_setCaptCompUpdateMethod(PWM_MOTOR_RIGHT_INST, DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE, DL_TIMERA_CAPTURE_COMPARE_1_INDEX); DL_TimerA_setCaptureCompareValue(PWM_MOTOR_RIGHT_INST, 3200, DL_TIMER_CC_1_INDEX); DL_TimerA_enableClock(PWM_MOTOR_RIGHT_INST); DL_TimerA_setCCPDirection(PWM_MOTOR_RIGHT_INST , DL_TIMER_CC1_OUTPUT ); } /* * Timer clock configuration to be sourced by BUSCLK / (10000000 Hz) * timerClkFreq = (timerClkSrc / (timerClkDivRatio * (timerClkPrescale + 1))) * 1000000 Hz = 10000000 Hz / (8 * (9 + 1)) */ static const DL_TimerA_ClockConfig gTIMER_0ClockConfig = { .clockSel = DL_TIMER_CLOCK_BUSCLK, .divideRatio = DL_TIMER_CLOCK_DIVIDE_8, .prescale = 9U, }; /* * Timer load value (where the counter starts from) is calculated as (timerPeriod * timerClockFreq) - 1 * TIMER_0_INST_LOAD_VALUE = (20 ms * 1000000 Hz) - 1 */ static const DL_TimerA_TimerConfig gTIMER_0TimerConfig = { .period = TIMER_0_INST_LOAD_VALUE, .timerMode = DL_TIMER_TIMER_MODE_PERIODIC, .startTimer = DL_TIMER_START, }; SYSCONFIG_WEAK void SYSCFG_DL_TIMER_0_init(void) { DL_TimerA_setClockConfig(TIMER_0_INST, (DL_TimerA_ClockConfig *) &gTIMER_0ClockConfig); DL_TimerA_initTimerMode(TIMER_0_INST, (DL_TimerA_TimerConfig *) &gTIMER_0TimerConfig); DL_TimerA_enableInterrupt(TIMER_0_INST , DL_TIMERA_INTERRUPT_ZERO_EVENT); NVIC_SetPriority(TIMER_0_INST_INT_IRQN, 3); DL_TimerA_enableClock(TIMER_0_INST); } static const DL_UART_Main_ClockConfig gUART_K230ClockConfig = { .clockSel = DL_UART_MAIN_CLOCK_BUSCLK, .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1 }; static const DL_UART_Main_Config gUART_K230Config = { .mode = DL_UART_MAIN_MODE_NORMAL, .direction = DL_UART_MAIN_DIRECTION_TX_RX, .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE, .parity = DL_UART_MAIN_PARITY_NONE, .wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS, .stopBits = DL_UART_MAIN_STOP_BITS_ONE }; SYSCONFIG_WEAK void SYSCFG_DL_UART_K230_init(void) { DL_UART_Main_setClockConfig(UART_K230_INST, (DL_UART_Main_ClockConfig *) &gUART_K230ClockConfig); DL_UART_Main_init(UART_K230_INST, (DL_UART_Main_Config *) &gUART_K230Config); /* * Configure baud rate by setting oversampling and baud rate divisors. * Target baud rate: 115200 * Actual baud rate: 115190.78 */ DL_UART_Main_setOversampling(UART_K230_INST, DL_UART_OVERSAMPLING_RATE_16X); DL_UART_Main_setBaudRateDivisor(UART_K230_INST, UART_K230_IBRD_40_MHZ_115200_BAUD, UART_K230_FBRD_40_MHZ_115200_BAUD); /* Configure Interrupts */ DL_UART_Main_enableInterrupt(UART_K230_INST, DL_UART_MAIN_INTERRUPT_RX); /* Configure FIFOs */ DL_UART_Main_enableFIFOs(UART_K230_INST); DL_UART_Main_setRXFIFOThreshold(UART_K230_INST, DL_UART_RX_FIFO_LEVEL_1_2_FULL); DL_UART_Main_setTXFIFOThreshold(UART_K230_INST, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY); DL_UART_Main_enable(UART_K230_INST); } static const DL_UART_Main_ClockConfig gUART_IMU601ClockConfig = { .clockSel = DL_UART_MAIN_CLOCK_BUSCLK, .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1 }; static const DL_UART_Main_Config gUART_IMU601Config = { .mode = DL_UART_MAIN_MODE_NORMAL, .direction = DL_UART_MAIN_DIRECTION_TX_RX, .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE, .parity = DL_UART_MAIN_PARITY_NONE, .wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS, .stopBits = DL_UART_MAIN_STOP_BITS_ONE }; SYSCONFIG_WEAK void SYSCFG_DL_UART_IMU601_init(void) { DL_UART_Main_setClockConfig(UART_IMU601_INST, (DL_UART_Main_ClockConfig *) &gUART_IMU601ClockConfig); DL_UART_Main_init(UART_IMU601_INST, (DL_UART_Main_Config *) &gUART_IMU601Config); /* * Configure baud rate by setting oversampling and baud rate divisors. * Target baud rate: 115200 * Actual baud rate: 115190.78 */ DL_UART_Main_setOversampling(UART_IMU601_INST, DL_UART_OVERSAMPLING_RATE_16X); DL_UART_Main_setBaudRateDivisor(UART_IMU601_INST, UART_IMU601_IBRD_40_MHZ_115200_BAUD, UART_IMU601_FBRD_40_MHZ_115200_BAUD); /* Configure Interrupts */ DL_UART_Main_enableInterrupt(UART_IMU601_INST, DL_UART_MAIN_INTERRUPT_RX); DL_UART_Main_enable(UART_IMU601_INST); } static const DL_UART_Main_ClockConfig gUART_HC05ClockConfig = { .clockSel = DL_UART_MAIN_CLOCK_BUSCLK, .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1 }; static const DL_UART_Main_Config gUART_HC05Config = { .mode = DL_UART_MAIN_MODE_NORMAL, .direction = DL_UART_MAIN_DIRECTION_TX_RX, .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE, .parity = DL_UART_MAIN_PARITY_NONE, .wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS, .stopBits = DL_UART_MAIN_STOP_BITS_ONE }; SYSCONFIG_WEAK void SYSCFG_DL_UART_HC05_init(void) { DL_UART_Main_setClockConfig(UART_HC05_INST, (DL_UART_Main_ClockConfig *) &gUART_HC05ClockConfig); DL_UART_Main_init(UART_HC05_INST, (DL_UART_Main_Config *) &gUART_HC05Config); /* * Configure baud rate by setting oversampling and baud rate divisors. * Target baud rate: 9600 * Actual baud rate: 9599.81 */ DL_UART_Main_setOversampling(UART_HC05_INST, DL_UART_OVERSAMPLING_RATE_16X); DL_UART_Main_setBaudRateDivisor(UART_HC05_INST, UART_HC05_IBRD_40_MHZ_9600_BAUD, UART_HC05_FBRD_40_MHZ_9600_BAUD); /* Configure Interrupts */ DL_UART_Main_enableInterrupt(UART_HC05_INST, DL_UART_MAIN_INTERRUPT_RX); /* Setting the Interrupt Priority */ NVIC_SetPriority(UART_HC05_INST_INT_IRQN, 0); DL_UART_Main_enable(UART_HC05_INST); } static const DL_SPI_Config gSPI_0_config = { .mode = DL_SPI_MODE_CONTROLLER, .frameFormat = DL_SPI_FRAME_FORMAT_MOTO3_POL0_PHA0, .parity = DL_SPI_PARITY_NONE, .dataSize = DL_SPI_DATA_SIZE_8, .bitOrder = DL_SPI_BIT_ORDER_MSB_FIRST, }; static const DL_SPI_ClockConfig gSPI_0_clockConfig = { .clockSel = DL_SPI_CLOCK_BUSCLK, .divideRatio = DL_SPI_CLOCK_DIVIDE_RATIO_1 }; SYSCONFIG_WEAK void SYSCFG_DL_SPI_0_init(void) { DL_SPI_setClockConfig(SPI_0_INST, (DL_SPI_ClockConfig *) &gSPI_0_clockConfig); DL_SPI_init(SPI_0_INST, (DL_SPI_Config *) &gSPI_0_config); /* Configure Controller mode */ /* * Set the bit rate clock divider to generate the serial output clock * outputBitRate = (spiInputClock) / ((1 + SCR) * 2) * 8000000 = (80000000)/((1 + 4) * 2) */ DL_SPI_setBitRateSerialClockDivider(SPI_0_INST, 4); /* Set RX and TX FIFO threshold levels */ DL_SPI_setFIFOThreshold(SPI_0_INST, DL_SPI_RX_FIFO_LEVEL_1_2_FULL, DL_SPI_TX_FIFO_LEVEL_1_2_EMPTY); /* Enable module */ DL_SPI_enable(SPI_0_INST); } 两份代码在软件i2c的配置上有什么不
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