介绍了Fraunhofer HHI的HEVC软件解码器，该解码器采用资源高效的多线程架构，能够在4K60Hz UHD分辨率下实现实时解码。此外还展示了HEVC实时软件编码器和硬件解码器的功能，前者可在1080p HD分辨率下实现实时编码，后者为完全硬件基础，即使没有额外的处理器核心也能提供全高清(1080p30)的实时解码性能。
HEVC 4K Real-time Decoder
The resource efficient, multi-threaded architecture of Fraunhofer HHI's HEVC software decoder enables real-time decoding of 4K 60Hz UHD video and suits perfectly the ever-growing need for high-resolution video in applications ranging from very low bit-rate video conferencing over mobile web streaming to high-quality TV broadcasting.
HEVC Real-time Software Encoder
The latest real-time software encoder is able to encode 1080p HD video in real-time and stream it to Windows, Linux and Mac OS X clients.
HEVC Real-time Hardware Decoder
The H.265 / MPEG-HEVC ultra low delay decoder IP core is completely hardware based, and supports the HEVC main profile. Even without an additional processor core the decoding providing real-time performance for full HD resolution (1080p30) at a clock frequency below 150 MHz. The design is currently implemented on an Altera Stratix-V FPGA.
Performance Examples
HEVC real-time decoding on a workstation PC with Intel Core i7 Sandy Bridge processor
- 1080p50 at 8 Mbit/s utilizes 1 core
- 2160p50 at 13 Mbit/s utilizes 4 cores
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