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最新推荐文章于 2025-04-09 17:06:38 发布
原创 最新推荐文章于 2025-04-09 17:06:38 发布 · 410 阅读 · 0 ·
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博客内容为一句在优快云的问候语“Hi i here 优快云!”，未涉及更多信息技术相关关键信息。
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{"S34ML02G1", { .id = {0x01, 0xDA, 0x90, 0x95, 0x44} }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 5, .oobsize = 64, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_NAND_E }, {"S34ML02G2", { .id = {0x01, 0xF1, 0x80, 0x1D} }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 4, .oobsize = 64, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_NAND_E }, {"S34ML04G2", { .id = {0x01, 0xDC, 0x90, 0x95, 0x56} }, .pagesize = SZ_2K, .chipsize = SZ_512, .erasesize = SZ_128K, .options = 0, .id_len = 5, .oobsize = 128, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_NAND_E }, {"MX35LF1GE4AB", { .id = {0xC2, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, .pagesize = SZ_2K, .chipsize = SZ_128, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 64, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"MX35LF2G14AC", { .id = {0xC2, 0x20, 0xC2, 0x20, 0xC2, 0xF0, 0x9F, 0xE5} }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 5, .oobsize = 64, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"GD5F2GQ4UE9IG", { .id = { 0xC8, 0xD2, 0xC8, 0xD2, 0xC8, 0xFF, 0xFF, 0xFF } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 5, .oobsize = 128, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"GD5F1GQ4xExIH", { .id = { 0xC8, 0xD9, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 64, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_STD_E, HI_SPI_NAND_CMD_READ, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_STD_E, HI_SPI_NAND_CMD_PP, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x0, .hi_status_feature_reg = 0x0, {0} }, {"w25n01gv", { .id = { 0xEF, 0xAA, 0x21, 0x00, 0x00, 0xFF, 0xFF, 0xFF } }, .pagesize = SZ_2K, .chipsize = SZ_128, .erasesize = SZ_128K, .options = 0, .id_len = 5, .oobsize = 64, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_STD_E, HI_SPI_NAND_CMD_READ, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_STD_E, HI_SPI_NAND_CMD_PP, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x8, .hi_status_feature_reg = 0x0, {0} }, {"WS21SFVC32GA", { .id = { 0x2C, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 128, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x0, .hi_status_feature_reg = 0x0, {0} }, {"DS35Q1GB", { .id = { 0xe5, 0xf1, 0xe5, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_128, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 64, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .unique_id_if = HI_SPI_NAND_READ_UID_IF_OTP, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"TC58CVG0S3HxAIx", { .id = { 0x98, 0xC2, 0xe5, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 64, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_STD_E, HI_SPI_NAND_CMD_READ, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_STD_E, HI_SPI_NAND_CMD_PP, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_EN, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x0, .hi_status_feature_reg = 0x0, {0} }, {"F35SQA002G", { .id = { 0xCD, 0x72, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 3, .oobsize = 64, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"F35SQA001G", { .id = { 0xCD, 0x71, 0x71, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_128, .erasesize = SZ_128K, .options = 0, .id_len = 3, .oobsize = 64, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"XT26G02CWSIGA", { .id = { 0x0B, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 64, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"W25N02KV", { .id = { 0xEF, 0xAA, 0x22, 0x00, 0x00, 0xFF, 0xFF, 0xFF } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 3, .oobsize = 128, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x2, .hi_config_feature_reg = 0x8, .hi_status_feature_reg = 0x0, {0} }, {"35X2GBXXX", { .id = { 0xe5, 0xf2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 128, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"MX35LF2G24AD", { .id = { 0xC2, 0x24, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 3, .oobsize = 128, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"GD5F2GM7UEYIGR", { .id = { 0xC8, 0x92, 0xC8, 0x92, 0xC8, 0xFF, 0xFF, 0xFF } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 5, .oobsize = 128, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"XT26G00CWSIGA", { .id = { 0x0B, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_128, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 128, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, {"S35ML02G3", { .id = { 0x01, 0x25, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 2, .oobsize = 128, NAND_ECC_INFO(8, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_EN, .hi_protect_feature_reg = 0x2, .hi_config_feature_reg = 0x10, .hi_status_feature_reg = 0x0, {0} }, {"F2G14AD", { .id = { 0xC2, 0x14, 0x24, 0x35, 0x03, 0x00, 0x00, 0x00 } }, .pagesize = SZ_2K, .chipsize = SZ_256, .erasesize = SZ_128K, .options = 0, .id_len = 5, .oobsize = 128, NAND_ECC_INFO(16, SZ_1K), .nand_flash_type = HI_SPI_NAND_E, .read_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .write_addr_cycle = HI_NAND_ADDR_CYCLE_5_E, .erase_addr_cycle = HI_NAND_ADDR_CYCLE_3_E, .spi_nand_rw_cfg = { HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_READ_QUAD, HI_SPI_NAND_STD_READ_DUMMY_NUM, HI_SPI_NAND_QUADIN_QUADOUT_E, HI_SPI_NAND_CMD_WRITE_QUAD, HI_SPI_NAND_WRITE_DUMMY_NUM, {0} }, .hi_options = HI_NAND_INNER_ECC_DIS, .hi_protect_feature_reg = 0x0, .hi_config_feature_reg = 0x1, .hi_status_feature_reg = 0x0, {0} }, 函数的功能和用途
09-26
- 内部 ECC 被禁用（`.hi_options = HI_NAND_INNER_ECC_DIS`），由主机驱动软件处理 ECC --- ### 典型应用场景 当调用类似以下函数时： ```c struct nand_flash_dev *dev = nand_get_device_by_id(read_id_bytes...
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