Power Management

本文介绍了Android如何通过AppRestrictions、AppStandby、Doze和预设应用豁免来延长设备电池使用时间,重点讲解了避免不必要的应用豁免以维护平台对资源使用的控制。

Battery life is a perennial user concern. To extend battery life, Android continually adds new features to help the platform optimize the off-charger behavior of applications and devices.

Android includes the following battery life enhancements:

  • App Restrictions. The platform can suggest apps that negatively affect battery life, so that users can choose to restrict those apps from consuming resources. Apps are not background restricted by default.
  • App Standby. The platform can place unused applications in App Standby mode, temporarily restricting network access and deferring syncs and jobs for those applications.
  • Doze. The platform can enter a state of deep sleep (periodically resuming normal operations) if users have not actively used their device (screen off and stationary) for extended periods of time. Android 7.0 and later also enables Doze to trigger a lighter set of optimizations when users turn off the device screen yet continue to move around.
  • Exemptions. Preloaded system apps and cloud messaging services are typically exempted from App Standby and Doze by default. App developers can use Intents to apply these settings to their apps. Users can exempt apps from App Standby and Doze power-saving modes in the Settings menu.

Exempting applications

You can exempt applications from being subject to Doze or App Standby. Exemptions may be needed in the following use cases:

  • Device manufacturers using a Cloud Messaging platform other than Firebase Cloud Messaging (FCM).
  • Carrier using non-FCM Cloud Messaging platform
  • Third-party application using non-FCM Cloud Messaging platform

Warning: Do not exempt apps to avoid testing and optimizing. Unnecessary exemptions undermine the benefits of Doze and App Standby and can compromise the user experience, so we strongly suggest minimizing such exemptions as they allow applications to defeat beneficial controls the platform has over power use. If users become unhappy about the power consumption of these apps, it can lead to frustration, bad experiences (and negative reviews for the app), and customer support questions. For these reasons, we strongly recommend that you do not exempt third-party applications and instead exempt only cloud messaging services or apps with similar functions.

Apps exempted by default are listed in Settings > App & Notifications > Special app access > Battery Optimization. This list is used for exempting the app from both Doze and App Standby modes. To provide transparency to the user, the Settings menu MUST show all exempted applications.

Users can manually exempt apps via Settings > App & Notifications > APP-NAME > Battery > Battery Optimization and then selecting the app to turn off (or back on) optimization. However, users cannot unexempt any application or service that is exempted by default in the system image.

<think> 我们正在讨论的是嵌入式系统中的时钟与电源管理(Clock & Power Management)。根据提供的引用材料,特别是引用[1][3][4]都提到了ARM架构(如S3C2440/S3C44B0X)的时钟与电源管理模块。 主要组成部分: 1. 时钟控制(Clock Control) 2. USB控制(USB Control) 3. 电源控制(Power Control) 我将从以下几个方面展开: 一、时钟控制(Clock Control) 二、USB时钟控制(USB Clock Control) 三、电源管理(Power Management) 四、相关技术资料 注意:在描述中,我会使用LaTeX数学表达式来描述频率、时间等关系,并按照要求使用$...$或$$...$$格式。 --- ### 一、时钟控制(Clock Control) 时钟控制逻辑产生系统所需的时钟信号,包括: - $FCLK$:CPU核心时钟(如ARM920T内核) - $HCLK$:高速总线时钟(用于AHB总线,连接内存控制器、中断控制器等高速外设) - $PCLK$:低速总线时钟(用于APB总线,连接UART、I2C等低速外设) 系统通常包含两个锁相环(PLL): - **MPLL**:为主系统提供时钟($FCLK$, $HCLK$, $PCLK$) - **UPLL**:专用于USB模块,产生48MHz时钟($UCLK$) **时钟分频**:通过设置分频系数(如HDIVN, PDIVN)可调整时钟频率: $$ HCLK = \frac{FCLK}{HDIVN} \quad , \quad PCLK = \frac{FCLK}{PDIVN} $$ 其中$HDIVN$和$PDIVN$为分频系数寄存器值[^1][^3]。 **时钟源选择**:系统启动时使用外部晶振(XTAL)或外部时钟(EXTCLK)。PLL在锁定后切换为系统时钟源。外部晶振频率$f_{\text{ext}}$通常较低(如12MHz),PLL通过倍频产生高频时钟: $$ FCLK = (M \times f_{\text{ext}}) \div (P \times 2^S) $$ 其中$M,P,S$为MPLL配置参数(参见硬件手册)[^4]。 --- ### 二、USB时钟控制(USB Clock Control) USB接口需要精确的48MHz时钟: - 由UPLL产生:$UCLK = 48\text{MHz}$ - 配置UPLL的参数需满足: $$ UCLK = \frac{(U_M \times f_{\text{ext}})}{(U_P \times 2^{U_S})} = 48\text{MHz} $$ - 在UPLL锁定前,USB模块不可用[^3][^4]。 --- ### 三、电源管理(Power Management) ARM处理器支持多种电源模式以降低功耗: | 模式 | 特点 | 唤醒方式 | |-------------|----------------------------------------------------------------------|------------------------------| | **NORMAL** | 全功能模式,所有模块运行 | - | | **SLOW** | 不使用PLL,直接使用外部时钟($f_{\text{ext}}$) | 外部中断 | | **IDLE** | 停止CPU时钟($FCLK$),但总线($HCLK$, $PCLK$)和外设仍运行 | 中断 | | **SLEEP** | 断开内部电源(仅保留唤醒逻辑),PLL停止 | 复位或特定唤醒信号(如EINT) | **功耗对比**: $$ P_{\text{SLEEP}} < P_{\text{IDLE}} < P_{\text{SLOW}} < P_{\text{NORMAL}} $$ **模式切换流程**: ```mermaid stateDiagram-v2 [*] --> NORMAL NORMAL --> SLOW : 关闭PLL NORMAL --> IDLE : 停止FCLK IDLE --> NORMAL : 中断触发 NORMAL --> SLEEP : SLEEP指令 SLEEP --> [*] : 复位/唤醒信号 ``` 关键点: - 进入SLEEP模式前需配置唤醒源(如GPIO中断)[^3] - 退出SLEEP模式相当于硬件复位,需重新初始化系统[^4] --- ### 四、相关技术资料 1. **芯片手册**:如S3C2440/S3C44B0X的“CLOCK & POWER MANAGEMENT”章节(引用[1][3][4]) 2. **Linux内核支持**: - Common Clock Framework(引用[2]):提供通用时钟API(`clk_enable()`, `clk_set_rate()`等) - 通过Device Tree配置时钟树,例如: ```dts /* 示例:S3C2440时钟节点 */ clocks { osc: oscillator { compatible = "fixed-clock"; clock-frequency = <12000000>; }; mpll: mpll { compatible = "samsung,s3c2440-mpll"; clocks = <&osc>; }; }; ``` 3. **调试工具**: - 通过`/sys/kernel/debug/clk`查看时钟频率 - 使用`pm_suspend`命令测试电源模式 --- §§ 相关问题 §§ 1. 如何配置S3C2440的MPLL以产生特定频率的$FCLK$? 2. Linux Common Clock Framework中如何实现一个时钟驱动? 3. 在电源管理模式下,如何保留RAM数据? 4. USB主机控制器在SLEEP模式下的唤醒流程是什么? 5. ARM处理器中PLL锁定时间(Lock Time)对系统启动有何影响? </think> ### Clock Power Management 深度解析 Clock Power Management(时钟电源管理)是嵌入式系统的核心技术,通过动态控制时钟频率和电源状态来实现性能与功耗的平衡。基于ARM架构(如ARM920T)的系统通常包含**时钟控制**、**USB控制**和**电源控制**三大模块[^1][^3],其核心原理如下: --- #### 一、时钟控制架构 1. **多级时钟生成** 系统通过锁相环(PLL)将外部低频晶振(如12MHz)转换为高频时钟: $$ \begin{cases} \text{MPLL} \rightarrow \text{FCLK (CPU核心时钟)} \\ \text{MPLL} \rightarrow \text{HCLK (AHB总线时钟)} \\ \text{MPLL} \rightarrow \text{PCLK (APB外设时钟)} \\ \text{UPLL} \rightarrow \text{UCLK (USB专用48MHz时钟)} \end{cases} $$ 其中 $FCLK$、$HCLK$、$PCLK$ 通常满足 $FCLK \geq HCLK \geq PCLK$[^3][^4]。 2. **动态分频控制** 通过寄存器调节分频系数,实现时钟频率的动态调整: ```c // 示例:S3C2440时钟分频寄存器配置 rCLKDIVN = (0x02 << 1) | (0x01); // HDIVN=2, PDIVN=1 // 结果:HCLK = FCLK/4, PCLK = HCLK/2 ``` 此举可将外设功耗降低30%-60%[^4]。 --- #### 二、电源管理状态机 ARM处理器支持四级功耗模式,其功耗与唤醒延迟关系为: | 模式 | 功耗比 | 唤醒延迟 | 状态描述 | |------------|--------|-------------|------------------------------| | **NORMAL** | 100% | - | 全功能运行模式 | | **IDLE** | ≈40% | <1μs | 停止CPU时钟(FCLK)[^3] | | **SLOW** | ≈15% | 10-100μs | 禁用PLL,直连外部晶振 | | **SLEEP** | <1% | 毫秒级 | 仅保留唤醒电路供电 | ```mermaid stateDiagram-v2 NORMAL --> IDLE: 停止FCLK NORMAL --> SLOW: 关闭PLL IDLE --> NORMAL: 中断触发 SLOW --> NORMAL: 重启PLL NORMAL --> SLEEP: SLEEP指令 SLEEP --> NORMAL: 复位/外部唤醒 ``` --- #### 三、关键技术实现 1. **Linux Common Clock Framework** - 提供标准化时钟API:`clk_enable()`, `clk_set_rate()` - 设备树(DT)配置示例: ```dts clock: clock-controller@4c004000 { compatible = "samsung,s3c2440-clock"; reg = <0x4c004000 0x1000>; clocks = <&xtal>; // 外部晶振节点 #clock-cells = <1>; }; ``` 2. **低功耗策略** - **动态电压频率调节(DVFS)**: $$ P_{\text{dynamic}} \propto C \cdot V^2 \cdot f $$ 同步降低电压($V$)与频率($f$)可指数级降耗 - **时钟门控**:通过寄存器禁用未使用外设的时钟 ```c rCLKCON &= ~(1<<14); // 禁用UART0时钟 ``` --- #### 四、实战调试技巧 1. **时钟测量方法** - 示波器:监控CLKOUT引脚波形 - 寄存器读取: ```c uint32_t get_hclk() { return (rMPLLCON * xtal_freq) / (rCLKDIVN & 0x0F); } ``` 2. **功耗异常排查** - 检查`IDLE`模式下总线活动(如DMA) - 验证SLEEP模式唤醒源配置(EINT/GPIO)[^3] ---
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