ctors,dtors,_ctors&_dtors

本文介绍了一种用于管理静态构造函数和析构函数的方法,适用于运行时系统。通过使用特定的数据结构和编译器特性,该方法能够在程序启动和退出时正确调用静态构造函数与析构函数。

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/* ctors and dtors arrays -- to be used by runtime system */
/*   to call static constructors and destructors          */
/*                                                        */
/* NOTE: Use a C compiler to compile this file. If you    */
/*       are using GNU C++, be sure to use compile this   */
/*       file using a GNU compiler with the               */
/*       -fdollars-in-identifiers flag.                   */


#if defined(__GNUC__)

extern void __register_frame_info (const void *, void *);
extern void *__deregister_frame_info (const void *);
extern const unsigned __EH_FRAME_BEGIN__[];
static void _STI__15_ctors ()
{
  /* This structure must approximately match that in unwind-dw2-fde.h.
     In particular it must be no smaller, and no less aligned.  */
  static struct object {
    void *pc_begin; void *tbase; void *dbase; void *u;
    unsigned long b; void *fde_end; struct object *next;
  } object;
  __register_frame_info (__EH_FRAME_BEGIN__, &object);
}

static void _STD__15_dtors ()
{
  __deregister_frame_info (__EH_FRAME_BEGIN__);
}
#else
static void _STI__15_ctors ()
{
}

static void _STD__15_dtors ()
{
}
#endif
char __dso_handle = 0;

extern void (*_ctors[])();
void (*_ctors[])() =
    {
    _STI__15_ctors,
    0
    };

void _STD__15_dtors();

extern void (*_dtors[])();
void (*_dtors[])() =
    {
    _STD__15_dtors,
    0
    };

/* build variables */
#ifdef __GNUC__
__asm(" .section \".wrs_build_vars\",\"a\"");
#endif
#ifdef __DCC__
__asm(" .section \".wrs_build_vars\",\"r\"");
#endif
__asm(" .ascii \"tag SMP 1\"");
__asm(" .byte 0");
__asm(" .ascii \"end\"");
__asm(" .byte 0");
__asm(" .previous");





000635c8 <_STI__15_ctors>:
   635c8:   e1a0c00d    mov ip, sp
   635cc:   e92dd800    push    {fp, ip, lr, pc}
   635d0:   e24cb004    sub fp, ip, #4
   635d4:   e59f0008    ldr r0, [pc, #8]    ; 635e4 <_STI__15_ctors+0x1c>
   635d8:   e59f1008    ldr r1, [pc, #8]    ; 635e8 <_STI__15_ctors+0x20>
   635dc:   eb000000    bl  8 <__register_frame_info+0x8>
   635e0:   e89da800    ldm sp, {fp, sp, pc}
    ...

000635ec <_STD__15_dtors>:
   635ec:   e1a0c00d    mov ip, sp
   635f0:   e92dd800    push    {fp, ip, lr, pc}
   635f4:   e24cb004    sub fp, ip, #4
   635f8:   e59f0004    ldr r0, [pc, #4]    ; 63604 <_STD__15_dtors+0x18>
   635fc:   eb000000    bl  8 <__deregister_frame_info+0x8>
   63600:   e89da800    ldm sp, {fp, sp, pc}
   63604:   00000000    andeq   r0, r0, r0
boot_header.c文件的内容 #include "typedefs.h" extern const uint32_t CM7_START_ADDRESS; extern const uint32_t __APPBL_START; /****************************************************************************** * Boot header ******************************************************************************/ typedef const struct { const uint32_t Header; /* Header of boot header structure */ const uint32_t BootConfig; /* Boot Configuration Word */ const uint32_t Reserved3; /* Reserved */ const uint32_t* CM7_0_StartAddress; /* Start address of application on CM7_0 core */ const uint32_t Reserved4; /* Reserved */ const uint32_t* CM7_1_StartAddress; /* Start address of application on CM7_1 core */ const uint32_t Reserved5; /* Reserved */ const uint32_t* CM7_2_StartAddress; /* Start address of application on CM7_2 core */ const uint32_t* XRDCConfig_StartAddress; /* Address of XRDC configuration data */ const uint32_t* LCConfig; /* Address of LC configuration */ const uint32_t Reserved1; /* Reserved */ const uint32_t* HseFwHeader_StartAddress; /* Start address of HSE-FW image */ const uint32_t* AppBL_StartAddress; const uint8_t Reserved[188]; /* Reserved for future use */ const uint8_t CMAC[16]; /* CMAC */ } boot_header_t; /****************************************************************************** * XRDC Configuration ******************************************************************************/ typedef struct { uint32_t Header; uint32_t MDAConfig_ProcessorCore0; uint32_t MDAConfig_eDMA_AHB; uint32_t MDAConfig_TestPort_AHB; uint32_t MDAConfig_ProcessorCore1; uint32_t MDAConfig_ENET_AHB; uint32_t Reserved0[10]; uint32_t PDAC[14][2]; uint32_t Reserved2[20]; uint8_t CMAC[16]; } xrdc_config_t; /****************************************************************************** * LC Configuration ******************************************************************************/ typedef uint32_t lc_config_t; /****************************************************************************** * LC Configuration ******************************************************************************/ const lc_config_t lc_config = 0xffffffff; /****************************************************************************** * XRDC Configuration ******************************************************************************/ const xrdc_config_t xrdc_config = { .Header = 0xffffffff }; #if defined (__ghs__) #pragma ghs section rodata =".boot_header" const boot_header_t boot_header = { #elif defined (__GNUC__) const boot_header_t __attribute__((section (".boot_header"))) boot_header = { #elif defined (__ICCARM__) #pragma location = ".boot_header" const boot_header_t boot_header = { #endif .Header = 0x5AA55AA5, .BootConfig = (1 << 0) | (1<<3), /* Booting core is always core CM7 */ .CM7_0_StartAddress = (const uint32_t*)&CM7_START_ADDRESS, .XRDCConfig_StartAddress = (const uint32_t*)&xrdc_config, .LCConfig = (const uint32_t*)&lc_config, .HseFwHeader_StartAddress = (const uint32_t*)0U, .AppBL_StartAddress = (const uint32_t*)&__APPBL_START }; #if defined (__ghs__) #pragma ghs section rodata =default #endif main.c的内容 #include "S32K344.h" #include "hse_host.h" #include "hse_host_attrs.h" #include "hse_demo_app_services.h" #include "hse_host_flashSrv.h" #include "hse_interface.h" #include "hse_host_boot.h" #include <string.h> #include "pflash.h" #include "flash.h" /*============================================================================= * LOCAL MACROS =============================================================================*/ #define GENERATE_TAG 1 #define VERIFY_TAG 1 #define TAG_LENGTH 28 #define APP_HEADER_LENGTH 0x40U /*============================================================================= * GLOBAL VARIABLES =============================================================================*/ extern bool_t IsTagLocationErased; /* RAM address for GMAC */ uint8_t temp_addr_of_app_image[32] = {0xFF}; const uint8_t* pAppBL = 0x005040C0; uint32_t AppBL_codeLength = 0x1000; /*============================================================================= * GLOBAL FUNCTIONS DEFINITION =============================================================================*/ /*============================================================================= * MAIN APPLICATION * ==========================================================================*/ int main(void) { hseSrvResponse_t srvResponse; tFLASH_STATUS status; /* Verify ADKP */ if(FALSE == check_debug_password_programmed_status()){ while(1); } #if GENERATE_TAG /* Generate Tag of size 32 over the provided APPBL */ srvResponse = HSE_SignBootImage(pAppBL, TAG_LENGTH, temp_addr_of_app_image); ASSERT(HSE_SRV_RSP_OK == srvResponse); /* Write the generated TAG to the end of the application in FLASH */ PFLASH_Unlock(PFLASH_BL1, PFLASH_SS0, PFLASH_S0); status = FLASH_Write (pAppBL + APP_HEADER_LENGTH + AppBL_codeLength, temp_addr_of_app_image, sizeof(temp_addr_of_app_image)); (void)status; #endif /* Verify that the generated TAG is valid for the APPBL */ #if VERIFY_TAG srvResponse = HSE_VerifyBootImage(pAppBL); ASSERT(HSE_SRV_RSP_OK == srvResponse); #endif /*Successful executions means that the secure boot is properly configured and the user can generate a Reset in order to start secure boot on the next boot */ for (;;) { } return 0; } S32K344_flash.ld文件的内容 __STACK_SIZE = 0x00001000; __HEAP_SIZE = 0x00001000; /* Linker script to configure memory regions. */ MEMORY { ITCM (RWX) : ORIGIN = 0x00000000, LENGTH = 0x10000 PFLASH (RX) : ORIGIN = 0x00400000, LENGTH = 0xFFFFF AppBL (RX) : ORIGIN = 0x005040C0, LENGTH = 0x1000 DFLASH (RX) : ORIGIN = 0x10000000, LENGTH = 0x20000 DTCM (RW) : ORIGIN = 0x20000000, LENGTH = 0x20000 SRAM0_STDBY (RW) : ORIGIN = 0x20400000, LENGTH = 0x8000 SRAM (RW) : ORIGIN = 0x20408000, LENGTH = 0x48000 } TARGET(binary) /* specify the file format of binary file */ INPUT (C:/NXP/S32K344_SecureBootBlinky.bin) OUTPUT_FORMAT(default) /* restore the out file format */ /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler * * It defines following symbols, which code can use without definition: * __exidx_start * __exidx_end * __ecc_table_start__ * __ecc_table_end__ * __etext * __data_start__ * __preinit_array_start * __preinit_array_end * __init_array_start * __init_array_end * __fini_array_start * __fini_array_end * __data_end__ * __bss_start__ * __bss_end__ * __end__ * end * __HeapLimit * __StackLimit * __StackTop * __stack */ ENTRY(Reset_Handler) SECTIONS { .text : { KEEP(*(.vectors)) *(.text*) KEEP(*(.init)) KEEP(*(.fini)) /* .ctors */ *crtbegin.o(.ctors) *crtbegin?.o(.ctors) *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) *(SORT(.ctors.*)) *(.ctors) /* .dtors */ *crtbegin.o(.dtors) *crtbegin?.o(.dtors) *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) *(.rodata*) KEEP(*(.eh_frame*)) } > PFLASH .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > PFLASH __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > PFLASH __exidx_end = .; .ecc.table : { . = ALIGN(4); __ecc_table_start__ = .; QUAD (__data_start__) QUAD ((__data_end__ - __data_start__) / 8) QUAD (__bss_start__) QUAD ((__bss_end__ - __bss_start__) / 8) QUAD (__HeapTop) QUAD ((__HeapLimit - __HeapTop) / 8) QUAD (__StackLimit) QUAD ((__StackTop - __StackLimit) / 8) QUAD (ORIGIN(ITCM)) QUAD (LENGTH(ITCM) / 8) QUAD (ORIGIN(DTCM)) QUAD (LENGTH(DTCM) / 8) __ecc_table_end__ = .; } > PFLASH .copy.table : { . = ALIGN(4); __copy_table_start__ = .; LONG (__etext) LONG (__data_start__) LONG ((__data_end__ - __data_start__) / 4) /* Add each additional data section here */ /* LONG (__etext2) LONG (__data2_start__) LONG ((__data2_end__ - __data2_start__) / 4) */ __copy_table_end__ = .; } > PFLASH .zero.table : { . = ALIGN(4); __zero_table_start__ = .; /* Add each additional bss section here */ /* LONG (__bss2_start__) LONG ((__bss2_end__ - __bss2_start__) / 4) */ __zero_table_end__ = .; } > PFLASH __etext = ALIGN(8); .AppBL : { . = ALIGN (0x4); __AppBL_start__ = .; C:/NXP/S32K344_SecureBootBlinky.bin (.data) . = ALIGN (0x4); __AppBL_end__ = .; } > AppBL __APPBL_START = ORIGIN(AppBL); __APPBL_SIZE = __AppBL_end__ - __AppBL_start__; .boot_header : { KEEP(*(.boot_header)) } > DFLASH .standby_ram : { *(.standby_ram) } > SRAM0_STDBY /* Due ECC initialization sequence __data_start__ and __data_end__ should be aligned on 8 bytes */ .data : AT (__etext) { . = ALIGN(8); __data_start__ = .; *(vtable) *(.data) *(.data.*) . = ALIGN(4); /* preinit data */ PROVIDE_HIDDEN (__preinit_array_start = .); KEEP(*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(4); /* init data */ PROVIDE_HIDDEN (__init_array_start = .); KEEP(*(SORT(.init_array.*))) KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); . = ALIGN(4); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); KEEP(*(SORT(.fini_array.*))) KEEP(*(.fini_array)) PROVIDE_HIDDEN (__fini_array_end = .); KEEP(*(.jcr*)) . = ALIGN(8); /* All data end */ __data_end__ = .; } > SRAM /* Due ECC initialization sequence __bss_start__ and __bss_end__ should be aligned on 8 bytes */ .bss : { . = ALIGN(8); __bss_start__ = .; *(.bss) *(.bss.*) *(COMMON) . = ALIGN(8); __bss_end__ = .; } > SRAM /* Due ECC initialization sequence __HeapTop and __HeapLimit should be aligned on 8 bytes */ .heap (COPY): { . = ALIGN(8); __HeapTop = .; __end__ = .; _end = .; PROVIDE(end = .); . = . + __HEAP_SIZE; . = ALIGN(8); __HeapLimit = .; } > SRAM /* Due ECC initialization sequence __StackLimit and __StackTop should be aligned on 8 bytes */ .stack (ORIGIN(SRAM) + LENGTH(SRAM) - __STACK_SIZE) (COPY) : { . = ALIGN(8); __StackLimit = .; . = . + __STACK_SIZE; . = ALIGN(8); __StackTop = .; } > SRAM PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") CM7_START_ADDRESS = ORIGIN(PFLASH); __STDBYRAM_START = ORIGIN(SRAM0_STDBY); __STDBYRAM_SIZE = LENGTH(SRAM0_STDBY); } 上述代码实现了一个什么样 的功能?
最新发布
07-25
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