vivado2020 xdc约束文件未配置所有端口报错解决办法

最新推荐文章于 2024-12-11 21:26:14 发布

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最新推荐文章于 2024-12-11 21:26:14 发布 · 2.6k 阅读

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#硬件工程 #vivado

博客讲述了在Vivado中遇到的报错问题，即源文件使用了32位变量，但板子上的16位端口未全部配置，导致16个端口未被分配特定位置约束。错误信息提示需要为所有端口指定pin位置，否则可能影响性能、信号完整性和设备安全。解决方法是通过设置警告级别，允许创建比特流，但推荐完全指定端口位置。

问题描述：

在源文件中使用了32位变量，但他在板子上对应的只有16位端口，有16个端口没有配置，vivado报错。报错信息如下：

[DRC UCIO-1] Unconstrained Logical Port: 16 out of 22 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command:
set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs
infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem p