HDLBits-Fsm ps2、Fsm ps2data、Fsm serial、Fsm serialdata、Fsm serialdp

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已于 2022-05-15 23:01:12 修改 · 858 阅读

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#其他 #fpga开发

于 2022-05-15 22:57:00 首次发布

本文介绍了如何设计有限状态机（FSM）以处理PS/2鼠标协议的字节流，包括寻找消息边界并输出接收到的三字节消息。此外，还讨论了处理带有起始和停止位的串行通信协议的FSM设计，以及在接收到完整字节后输出数据的实现。最后，通过增加一位并进行异或操作改进了串行接收器的FSM。

Fsm ps2

The PS/2 mouse protocol sends messages that are three bytes long. However, within a continuous byte stream, it's not obvious where messages start and end. The only indication is that the first byte of each three byte message always has bit[3]=1 (but bit[3] of the other two bytes may be 1 or 0 depending on data).

We want a finite state machine that will search for message boundaries when given an input byte stream. The algorithm we'll use is to discard bytes until we see one with bit[3]=1. We then assume that this is byte 1 of a message, and signal the receipt of a message once all 3 bytes have been received (done).

The FSM should signal done in the cycle immediately after the third byte of each message was successfully received.

module top_module(
    input clk,
    input [7:0] in,
    input reset,    // Synchronous reset
    output done); //
    parameter S0=0, S1=1, S2=2, S3=3;
    reg [1:0] state, next;

    // State transition logic (combinational)
    always @(*) begin
        case (state)
            S0: next= in[3]? S1:S0;
            S1: next= S2;
            S2: next= S3;
            S3: next= in[3]? S1:S0;
        endcase
    end

    // State flip-flops (sequential)
    always @(posedge clk) begin
        if(reset) state<=S0;
        else state<=next; end
 
    // Output logic
    assign done= (state == S3);

endmodule