You must write instruction mnemonics, pseudo-instructions, directives, and symbolic register names
(except a1-a4 and v1-v8 in A32 or T32 instructions) in either all uppercase or all lowercase. You must
not use mixed case. Labels and comments can be in uppercase, lowercase, or mixed case.
AREA A32ex, CODE, READONLY
; Name this block of code A32ex
ENTRY ; Mark first instruction to execute
start
MOV r0, #10 ; Set up parameters
MOV r1, #3
ADD r0, r0, r1 ; r0 = r0 + r1
stop
MOV r0, #0x18 ; angel_SWIreason_ReportException
LDR r1, =0x20026 ; ADP_Stopped_ApplicationExit
SVC #0x123456 ; AArch32 semihosting (formerly SWI)
END ; Mark end of file
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Many of the core register names have synonyms. The following table shows the predeclared core registers:
Register names | Meaning |
r0-r15 and R0-R15 | General purpose registers. |
a1-a4 | Argument, result or scratch registers. These are synonyms for R0 to R3. |
v1-v8 | Variable registers. These are synonyms for R4 to R11. |
SB | Static base register. This is a synonym for R9. |
IP | Intra-procedure call scratch register. This is a synonym for R12. |
SP | Stack pointer. This is a synonym for R13. |
LR | Link register. This is a synonym for R14. |
PC | Program counter. This is a synonym for R15. |
Table 3-2 Predeclared core registers in AArch32 state
With the exception of a1-a4 and v1-v8, you can write the register names either in all upper case or all lower case.