FPGA - 231227 - 课程设计 - 5CSEMA5F31C6 - 电子万年历

• TAG - $FPGA、Verilog、课程设计、5CSEMA5F31C6、电子万年历$

---

• 顶层模块

module TOP(
	input CLK,RST,inA,inB,inC,switch_alarm,
	output led,beep_led,
	output [41:0] dp
);

// 按键消抖模块
wire 			keyA_turn, keyB_turn, keyC_turn;             

// 按键处理模块
wire     	select_sign;
wire [1:0]	flag_turn;
wire [1:0] 	flag_switch;

wire     	year_add, month_add, day_add;
wire			hour_add, minute_add, second_add;
wire      	alarm_hour_add, alarm_minute_add, alarm_second_add;

// 时钟模块
wire [6:0] 	year;
wire [4:0] 	day;
wire [3:0] 	month;

wire [4:0] 	hour;
wire [5:0] 	minute;
wire [5:0] 	second;

// 数码管显示模块
wire [32:0]	digital_clock;

// 闹钟模块
wire [4:0]	alarm_hour; 
wire [5:0]	alarm_minute; 
wire [5:0]	alarm_second;
							
//按键消抖模块
right_key rk_A(
	.clk			(CLK),
	.rst_n		(RST),
	.key_in		(inA),
	.key_flag	(keyA_turn)
);
right_key rk_B(
.clk        	(CLK),
.rst_n      	(RST),
.key_in      	(inB),
.key_flag   	(keyB_turn)
);
right_key rk_C(
.clk        	(CLK),
.rst_n      	(RST),
.key_in     	(inC),
.key_flag  		(keyC_turn)
);

//按键处理模块
sel_add eg_sel_add(
.clk           	(CLK),
.rst_n          	(RST),

.key_turn      	(keyA_turn),
.key_switch     	(keyB_turn),
.key_add       	(keyC_turn),

.select_sign    	(select_sign),
.flag_turn     	(flag_turn),
.flag_switch  		(flag_switch),

.second_add     	(second_add), 
.minute_add    	(minute_add), 
.hour_add      	(hour_add),    
.day_add        	(day_add),    
.month_add     	(month_add),  
.year_add      	(year_add),   
.alarm_second_add	(alarm_second_add), 
.alarm_minute_add	(alarm_minute_add), 
.alarm_hour_add 	(alarm_hour_add)    
);

// 时钟模块
clock eg_clock(
.clk              	(CLK),
.rst_n            	(RST),

.select_sign     		(select_sign),

.second_add      		(second_add),
.minute_add        	(minute_add),
.hour_add          	(hour_add),
.day_add           	(day_add),
.month_add          	(month_add),
.year_add          	(year_add),

.hour               	(hour),
.minute             	(minute),
.second            	(second),
.day              	(day),
.month              	(month),
.year              	(year)
);

// 数码管显示模块
display eg_display(
.CLK	             	(CLK),
.RST  	           	(RST),

.flag_turn        	(flag_turn),
.flag_switch       	(flag_switch),

.alarm_h		        	(alarm_hour),
.alarm_m		      	(alarm_minute),
.alarm_s		      	(alarm_second),

.year              	(year),
.month             	(month),
.day               	(day),
.h		              	(hour),
.m		            	(minute),
.s		            	(second),

.dp		           	(dp)
);

// 闹钟模块
alarm eg_alarm(
.clk              	(CLK),
.rst_n           		(RST),

.switch_alarm     	(switch_alarm),
.second           	(second),
.minute            	(minute),
.hour              	(hour),
.alarm_second_add  	(alarm_second_add), 
.alarm_minute_add 	(alarm_minute_add), 
.alarm_hour_add   	(alarm_hour_add),
			
.led              	(led),	
.beep_led          	(beep_led),	

.alarm_second     	(alarm_second),
.alarm_minute      	(alarm_minute),
.alarm_hour       	(alarm_hour)             
);
endmodule 

• 按键消抖模块

// 按键消抖模块
module right_key
#(parameter WIDTH = 20'd999_999)		
(
input				clk,rst_n,key_in,
output	reg 	key_flag
);
reg[19:0]	CNT_20MS;
always @(posedge clk or negedge rst_n) begin
	if(!rst_n) 						CNT_20MS<=20'd0;
	else if(key_in==1'b1) 		CNT_20MS<=20'd0;
	else if(CNT_20MS==WIDTH) 	CNT_20MS<=WIDTH;
	else 								CNT_20MS<=CNT_20MS+1;
end
 
always @(posedge clk or negedge rst_n) begin
	if(!rst_n) 						key_flag<=1'b0;
	else if(CNT_20MS==WIDTH-1) key_flag<=1'b1;
	else 								key_flag<=1'b0;
end

endmodule

• 按键处理模块

// 按键处理模块
module sel_add(
input clk, rst_n,

input key_turn,
input key_switch,
input key_add,

output select_sign,
output reg [1:0] flag_switch,
output reg [1:0] flag_turn,

output reg second_add, minute_add, hour_add, day_add, month_add, year_add,
output reg alarm_second_add, alarm_minute_add, alarm_hour_add
);
 
reg [3:0] flag_add=0;	
reg [1:0] turn_state=0,turn_next_state=0;  //翻页状态机（分别是输出、现态、次态）
reg [1:0] switch_state=0,switch_next_state=0;//当前选择数码管状态机
 
assign select_sign=(flag_add==4'b0000);

// 1
//页面切换的状态机
	//次态电路
	always@(negedge key_turn or negedge rst_n) 
	
	begin
		if(!rst_n) turn_next_state=2'b00;
		else
			case(turn_state)
			2'b00:turn_next_state=2'b01;
			2'b01:turn_next_state=2'b10;
			2'b10:turn_next_state=2'b00;
			default:turn_next_state=2'b00;
			endcase
	end
	//次态到现态转换
	always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)  turn_state<=2'b00;
		else        turn_state<=turn_next_state;
	end
	//输出电路
	always@(rst_n or turn_state)
	begin
		if(!rst_n)  flag_turn= 2'b00;
		else
			case(turn_state)
			2'b00:flag_turn=2'b00;
			2'b01:flag_turn=2'b01;
			2'b10:flag_turn=2'b10;
			default:flag_turn=2'b00;
			endcase
	end

// 2
//数码管闪烁选择的状态机
	//次态电路
	always@(negedge key_switch or negedge rst_n) 
	
	begin
		if(!rst_n) switch_next_state=2'b00;
		else
			case(switch_state)
			2'b00:switch_next_state=2'b01;
			2'b01:switch_next_state=2'b10;
			2'b10:switch_next_state=2'b11;
			2'b11:switch_next_state=2'b00;
			default:switch_next_state=2'b00;
			endcase
	end
	//次态-->现态转换
	always@(posedge clk or negedge rst_n)
	begin
		if(!rst_n)  switch_state<=2'b00;
		else        switch_state<=switch_next_state;
	end
	//输出电路
	always@(rst_n or switch_state)
	begin
		if(!rst_n)  flag_switch= 2'b00;
		else
			case(switch_state)
			2'b00:flag_switch=2'b00;
			2'b01:flag_switch=2'b01;
			2'b10:flag_switch=2'b10;
			2'b11:flag_switch=2'b11;
			default:switch_next_state=2'b00;
			endcase
	end

// 3
	//增一选择项目
	always@(turn_state or switch_state or rst_n) 
	begin
		if(!rst_n)