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原创 UEFI开发工程师的编程必备手册

原创 [DRAM Test]DDR5 CUDIMM and CSODIMM内存条

[DRAM Test]DDR5 CUDIMM and CSODIMM内存条

原创 [DRAM Test]英特尔第二款Lunar Lake处理器Ultra 5 238V曝光！配备32GB内存

[DRAM Test]英特尔第二款Lunar Lake处理器Ultra 5 238V曝光！配备32GB内存

原创 [DRAM Test]hPPR and sPPR(Hard & Soft Post Package Repair) of DDR4

[DRAM Test]hPPR and sPPR(Hard & Soft Post Package Repair) of DDR4

原创 [DRAM Test]hPPR and sPPR(Hard & Soft Post Package Repair) of DDR5

[DRAM Test]hPPR and sPPR(Hard & Soft Post Package Repair) of DDR5

原创 [DRAM Test]Memory Initialization,Training and Calibration of LPDDR5/5X

[DRAM Test]Memory Initialization,Training and Calibration of LPDDR5/5X

原创 [DRAM Test]Memory Initialization,Training and Calibration of LPDDR4/4X

[DRAM Test]Memory Initialization,Training and Calibration of LPDDR4

原创 [DRAM Test]Memory Initialization, Training and Calibration of DDR5

[DRAM Test]Memory Initialization, Training and Calibration of DDR5

原创 [DRAM Test]Memory Initialization, Training and Calibration of DDR4

[DRAM Test]Memory Initialization, Training and Calibration of DDR4

原创 [DRAM Test]LPDDR4 VS LPDDR4X VS DDR4, LPDDR5 VS LPDDR5X VS DDR5

[DRAM Test]LPDDR4 VS LPDDR4X VS DDR4, LPDDR5 VS LPDDR5X VS DDR5

原创 [DRAM Test]LPDDR5 PCB的布线注意事项------2

正常的一颗64位的DDR颗粒上总体划分为大的通道是0和1两个大的channel，细分的话每个大的channel可以分为A和B两个小的channel。

原创 [DRAM Test]LPDDR5 PCB的布线注意事项--01

• Maximum length (PCB + package) should not exceed 1500 mils.（最大长度（PCB+封装）不应超过1500MIL，这个可以在前期走线的时候把走线的长度规则加上，走线总线的长度规则是不能加在total etch length这个规则上的，至于该怎么添加之前的文章中也有提及的，这边就不再赘述了，还有一点就是在绕线之前记得先把单板的层叠设置好，接着就是在规则管理器中把PIN-DELAY和过孔的Z-AXIS_DELAY都勾选上的。

原创 [DRAM Test]MRC中的MrcMemoryAddressDecode()函数

[DRAM Test]MRC中的MrcMemoryAddressDecode()函数

原创 ​[DRAM Test]DRAM Failures之（Rowhammer、SPOILER、RAMBleed、TRRespass、Half-Double、软错误、故障模型）

​[DRAM Test]DRAM Failures之（Rowhammer、SPOILER、RAMBleed、TRRespass、Half-Double、软错误、故障模型）

原创 ​[DRAM Test]DRAM Failures之漏电流与寄生电容

​[DRAM Test]DRAM Failures之漏电流与寄生电容

原创 ​[DRAM Test]Memory Initialization, Training and Calibration for DDR4

Memory Initialization, Training and Calibration for DDR4

原创 ​[DRAM Test]Intel MRC(Memory Reference Code)

Memory Reference Code

原创 ​[DRAM Test]不开机内存(Unbootable Memory)的测试、维修工具大全

​[DRAM Test]不开机内存(Unbootable Memory)的测试、维修工具大全

原创 [DRAM Test]内存测试、内存检测、内存维修工具汇总

[DRAM Test]内存测试、内存检测、内存维修工具汇总

原创 [DRAM Memory Address Mapping]逻辑地址、虚拟地址、线性地址、物理地址、DRAM行列地址

[DRAM Memory Address Mapping]逻辑地址、虚拟地址、线性地址、物理地址、DRAM行列地址

原创 [DRAM Memory Address Mapping]在UEFI环境下，获取DRAM行列地址(DRAM Address)的编程实现

[DRAM Memory Address Mapping]在UEFI环境下，获取DRAM行列地址(DRAM Address)的编程实现

原创 [DRAM Memory Address Mapping]在LINUX环境下，获取DRAM行列地址(DRAM Address)的编程实现

CPU SOCKET---->Memory Controller----->Channel-------＞DIMM-------＞Rank-------＞Chip------------＞Bank Group-------->Bank--------＞Memory Array------->Row&Column[DRAM Memory Address Mapping]DRAM的结构原理剖析-优快云博客Machine Check Exception (MCE) 是一种硬件错误，通常与CPU、内存、电源或者